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briansull
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Mar 15, 2021
Fix some RCR/RCL latencies also.
briansull
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Mar 16, 2021
sandreenko
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Apr 2, 2021
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sandreenko
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LGTM, Brian would be a better person to sign off but he is oof now.
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So this can be merged? I don't have write access to the repo. |
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sure, just wanted to give others a few days to add feedback if they had it. |
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While doing diffs for #49585 I noticed that SHR PerfScores were way off:
shr reg, clcosts were assigned toshr reg, constinstructions.mul/imullatencies to reflect actual use cases.