Fix up hijacking on arm32 (preserve async continuation register) #123057
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Pull request overview
This PR fixes hijacking on ARM32 by preserving the r2 register, which may contain an async continuation object reference. This aligns ARM32 behavior with AMD64 (which preserves rcx) and ARM64 (which preserves x2).
Key Changes:
- Added PTFF_SAVE_R2 flag definition to enable saving/restoring r2 in transition frames
- Modified PUSH_PROBE_FRAME/POP_PROBE_FRAME macros to save and restore r2
- Updated FixupHijackedCallstack to preserve r0, r1, and r2 during hijack fixup
- Adjusted stack offset calculations to account for the additional saved register
Reviewed changes
Copilot reviewed 2 out of 2 changed files in this pull request and generated 1 comment.
| File | Description |
|---|---|
| src/coreclr/nativeaot/Runtime/unix/unixasmmacrosarm.inc | Adds PTFF_SAVE_R2 constant (0x00000800) and clarifying comment about matching PInvokeTransitionFrameFlags enum |
| src/coreclr/nativeaot/Runtime/arm/GcProbe.S | Updates GC probe frame macros to save/restore r2, adjusts stack offset calculation from 144 to 154, and modifies hijack handling to preserve r2 containing async continuation |
jkotas
reviewed
Jan 10, 2026
jkotas
reviewed
Jan 10, 2026
jkotas
reviewed
Jan 12, 2026
jkotas
reviewed
Jan 12, 2026
Co-authored-by: Jan Kotas <jkotas@microsoft.com>
jkotas
reviewed
Jan 13, 2026
jkotas
approved these changes
Jan 13, 2026
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Flag r2 (see async calling convention) during GC as it might contain an async continuation.
Contributes to #122492.