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Merged
amanasifkhalid merged 2 commits into from
Aug 1, 2024
Merged

Add missing tests for LoadVector*() #105703

amanasifkhalid merged 2 commits into from
Aug 1, 2024

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@SwapnilGaikwad
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@SwapnilGaikwad SwapnilGaikwad commented Jul 30, 2024

Fixes: #102878

@a74nh @kunalspathak @dotnet/arm64-contrib @arch-arm64-sve

@ghost ghost added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Jul 30, 2024
@dotnet-policy-service dotnet-policy-service bot added the community-contribution Indicates that the PR has been added by a community member label Jul 30, 2024
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SwapnilGaikwad commented Jul 30, 2024

Passes all Sve_LoadVector* tests. 
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector_float() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector_double() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector_sbyte() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector_short() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector_int() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector_long() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector_byte() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector_ushort() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector_uint() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector_ulong() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonFaulting_float() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonFaulting_double() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonFaulting_sbyte() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonFaulting_short() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonFaulting_int() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonFaulting_long() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonFaulting_byte() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonFaulting_ushort() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonFaulting_uint() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonFaulting_ulong() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonTemporal_float() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonTemporal_double() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonTemporal_sbyte() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonTemporal_short() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonTemporal_int() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonTemporal_long() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonTemporal_byte() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonTemporal_ushort() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonTemporal_uint() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorNonTemporal_ulong() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector128AndReplicateToVector_float() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector128AndReplicateToVector_double() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector128AndReplicateToVector_sbyte() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector128AndReplicateToVector_short() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector128AndReplicateToVector_int() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector128AndReplicateToVector_long() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector128AndReplicateToVector_byte() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector128AndReplicateToVector_ushort() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector128AndReplicateToVector_uint() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVector128AndReplicateToVector_ulong() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16NonFaultingSignExtendToInt32_int() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16NonFaultingSignExtendToInt64_long() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16NonFaultingSignExtendToUInt32_uint() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16NonFaultingSignExtendToUInt64_ulong() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt32NonFaultingSignExtendToInt64_long() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt32NonFaultingSignExtendToUInt64_ulong() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteNonFaultingSignExtendToInt16_short() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteNonFaultingSignExtendToInt32_int() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteNonFaultingSignExtendToInt64_long() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteNonFaultingSignExtendToUInt16_ushort() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteNonFaultingSignExtendToUInt32_uint() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteNonFaultingSignExtendToUInt64_ulong() : 12
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16SignExtendToInt32() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16SignExtendToInt64() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16SignExtendToUInt32() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16SignExtendToUInt64() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt32SignExtendToInt64() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt32SignExtendToUInt64() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendToInt16() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendToInt32() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendToInt64() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendToUInt16() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendToUInt32() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendToUInt64() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendToInt16() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendToInt32() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendToInt64() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendToUInt16() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendToUInt32() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendToUInt64() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt16ZeroExtendToInt32() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt16ZeroExtendToInt64() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt16ZeroExtendToUInt32() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt16ZeroExtendToUInt64() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt32ZeroExtendToInt64() : 5
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt32ZeroExtendToUInt64() : 5
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------

This was referenced Jul 30, 2024
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a74nh
a74nh approved these changes Jul 30, 2024
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This LGTM.

My only thought is there might be more templates missing those tests.

@build-analysis build-analysis bot mentioned this pull request Jul 30, 2024
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@SwapnilGaikwad SwapnilGaikwad marked this pull request as ready for review July 30, 2024 17:20
amanasifkhalid
amanasifkhalid approved these changes Aug 1, 2024
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LGTM too, thanks!

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amanasifkhalid commented Aug 1, 2024

My only thought is there might be more templates missing those tests.

Yeah, it might not be a bad idea to do a quick audit of the other templates, though Fuzzlyn is probably providing better scenario coverage than these templates, anyway.

@amanasifkhalid amanasifkhalid merged commit be32947 into dotnet:main Aug 1, 2024
@JulieLeeMSFT JulieLeeMSFT added this to the 9.0.0 milestone Aug 1, 2024
@SwapnilGaikwad SwapnilGaikwad deleted the github-fix-template-102878 branch August 2, 2024 09:15
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Arm64/Sve: SveLoadMaskedUnOpTest.template needs more scenario

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