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JIT ARM64-SVE: add missing test coverage for invalid immediate (#104809) #105677

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Merged
amanasifkhalid merged 2 commits into from
Aug 8, 2024
Merged

JIT ARM64-SVE: add missing test coverage for invalid immediate (#104809) #105677

amanasifkhalid merged 2 commits into from
Aug 8, 2024

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@mikabl-arm mikabl-arm commented Jul 30, 2024 •
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Fixes #104809 .

SVE APIs which tests were affected:

  • DotProductBySelectedScalar
  • SaturatingDecrementBy*
  • SaturatingIncrementBy*
  • ShiftRightArithmeticForDivide
  • DuplicateSelectedScalarToVector

All tests other than Sve_SaturatingIncrementBy32BitElementCount_long and Sve_SaturatingIncrementBy32BitElementCount_uint pass successfully. I believe SaturatingIncrementBy32BitElementCount has a bug which used to be silently ignored before and began to manifest itself now after the testing was fixed. @a74nh

Starting test: /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false -p System.Runtime.Serialization.EnableUnsafeBinaryFormatterSerialization=true ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll Sve_DotProductBySelectedScalar
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_DotProductBySelectedScalar_int() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_DotProductBySelectedScalar_long() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_DotProductBySelectedScalar_uint() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_DotProductBySelectedScalar_ulong() : 26
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------
Starting test: /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false -p System.Runtime.Serialization.EnableUnsafeBinaryFormatterSerialization=true ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll Sve_SaturatingDecrementBy
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy16BitElementCount_int() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy16BitElementCount_long() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy16BitElementCount_uint() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy16BitElementCount_ulong() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy16BitElementCount_vector_short() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy16BitElementCount_vector_ushort() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy32BitElementCount_int() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy32BitElementCount_long() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy32BitElementCount_uint() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy32BitElementCount_ulong() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy32BitElementCount_vector_int() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy32BitElementCount_vector_uint() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy64BitElementCount_int() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy64BitElementCount_long() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy64BitElementCount_uint() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy64BitElementCount_ulong() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy64BitElementCount_vector_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy64BitElementCount_vector_ulong() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy8BitElementCount_int() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy8BitElementCount_long() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy8BitElementCount_uint() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementBy8BitElementCount_ulong() : 8
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_int_byte() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_int_ushort() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_int_uint() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_int_ulong() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_long_byte() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_long_ushort() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_long_uint() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_long_ulong() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_uint_byte() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_uint_ushort() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_uint_uint() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_uint_ulong() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_ulong_byte() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_ulong_ushort() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_ulong_uint() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_ulong_ulong() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_vector_short() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_vector_int() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_vector_long() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_vector_ushort() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_vector_uint() : 7
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingDecrementByActiveElementCount_vector_ulong() : 7
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------
Starting test: /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false -p System.Runtime.Serialization.EnableUnsafeBinaryFormatterSerialization=true ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll Sve_SaturatingIncrementBy
===================Running default===================
------------------- {} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStress': '1'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStress': '2'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'TailcallStress': '1'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'ReadyToRun': '0'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStressRegs': '2'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStressRegs': '3'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStressRegs': '4'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStressRegs': '8'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStressRegs': '0x10'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStressRegs': '0x80'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStressRegs': '0x1000'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStressRegs': '0x2000'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------
Test failed:
..........................................
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_long() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.long.cs:line 62
   at Program.<<Main>$>g__TestExecutor3564|0_3565(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89602
System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_SaturatingIncrementBy32BitElementCount_uint() in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/Arm/Sve/Sve_ro/Sve_ro/gen/Sve.SaturatingIncrementBy32BitElementCount.uint.cs:line 62
   at Program.<<Main>$>g__TestExecutor3565|0_3566(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) in /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/obj/linux.arm64.Checked/Managed/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/generated/XUnitWrapperGenerator/XUnitWrapperGenerator.XUnitWrapperGenerator/FullRunner.g.cs:line 89626
Starting test: /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false -p System.Runtime.Serialization.EnableUnsafeBinaryFormatterSerialization=true ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll Sve_ShiftRightArithmeticForDivide
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_ShiftRightArithmeticForDivide_sbyte() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_ShiftRightArithmeticForDivide_short() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_ShiftRightArithmeticForDivide_int() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_ShiftRightArithmeticForDivide_long() : 26
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------
Starting test: /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false -p System.Runtime.Serialization.EnableUnsafeBinaryFormatterSerialization=true ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll Sve_DuplicateSelectedScalarToVector
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_DuplicateSelectedScalarToVector_float() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_DuplicateSelectedScalarToVector_double() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_DuplicateSelectedScalarToVector_sbyte() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_DuplicateSelectedScalarToVector_short() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_DuplicateSelectedScalarToVector_int() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_DuplicateSelectedScalarToVector_long() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_DuplicateSelectedScalarToVector_byte() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_DuplicateSelectedScalarToVector_ushort() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_DuplicateSelectedScalarToVector_uint() : 26
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_DuplicateSelectedScalarToVector_ulong() : 26
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------

@ghost ghost added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Jul 30, 2024
@dotnet-policy-service dotnet-policy-service bot added the community-contribution Indicates that the PR has been added by a community member label Jul 30, 2024
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mikabl-arm commented Jul 30, 2024

@a74nh @kunalspathak @SwapnilGaikwad

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mikabl-arm commented Jul 30, 2024

Stress testing for all of the relevant APIs passes successfully now. The issue with SaturatingIncrementBy32BitElementCount was in the test template parameters, not in the API's implementation.

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a74nh commented Jul 30, 2024

Stress testing for all of the relevant APIs passes successfully now. The issue with SaturatingIncrementBy32BitElementCount was in the test template parameters, not in the API's implementation.

Yes, because the invalid #uimm5 values are valid values at the instruction, they just won't give useful results. Immediate needs to be >31 for a fully invalid value.

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LGTM, assuming that all the templates missing if (!succeeded) have now been fixed.

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a74nh commented Jul 31, 2024

@mikabl-arm : could you add (#104809) to the end of the PR title (by clicking on the title in the webrowser). That'll cause it to link to the issue.

@mikabl-arm mikabl-arm changed the title JIT ARM64-SVE: add missing test coverage for invalid immediate JIT ARM64-SVE: add missing test coverage for invalid immediate (#104809) Jul 31, 2024
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LGTM, I'm assuming you ran the unoptimized tests too (HardwareIntrinsics_Arm_r.dll), right? @mikabl-arm

@JulieLeeMSFT JulieLeeMSFT added this to the 9.0.0 milestone Aug 1, 2024
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mikabl-arm commented Aug 8, 2024

LGTM, I'm assuming you ran the unoptimized tests too (HardwareIntrinsics_Arm_r.dll), right? @mikabl-arm

Just verified, unoptimized tests pass as well.

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amanasifkhalid commented Aug 8, 2024

/ba-g blocked by timeouts, dotnet install failures

@amanasifkhalid amanasifkhalid merged commit 6e0cc88 into dotnet:main Aug 8, 2024
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Arm64/Sve: Missing test coverage for invalid immediate

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