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Test failure JIT\\HardwareIntrinsics\\X86\\Avx1\\ConvertToVector_ro\\ConvertToVector_ro.cmd #75942

@v-wenyuxu

Description

@v-wenyuxu

Run: runtime-coreclr jitstress 20220919.1

Failed test:

coreclr windows x64 Checked jitstress1 @ Windows.10.Amd64.Open

- JIT\\HardwareIntrinsics\\X86\\Avx1\\ConvertToVector_ro\\ConvertToVector_ro.cmd

Error message:

Assert failure(PID 3412 [0x00000d54], Thread: 6948 [0x1b24]): Assertion failed 'node == m_firstNode' in 'JIT.HardwareIntrinsics.X86.SimpleUnaryOpTest__ConvertToVector256SingleInt32:RunReflectionScenario_Load():this' during 'Rationalize IR' (IL size 132; hash 0x2718f37c; FullOpts)

File: D:\a\_work\1\s\src\coreclr\jit\lir.cpp Line: 927
Image: C:\h\w\9881084D\p\corerun.exe
Return code:      1
Raw output file:      C:\h\w\9881084D\w\BCBB09D8\uploads\Reports\JIT.HardwareIntrinsics\X86\Avx1\ConvertToVector_ro\ConvertToVector_ro.output.txt
Raw output:
BEGIN EXECUTION
"C:\h\w\9881084D\p\corerun.exe" -p "System.Reflection.Metadata.MetadataUpdater.IsSupported=false"  ConvertToVector_ro.dll
Supported ISAs:
AES:       True
AVX:       True
AVX2:      True
AVXVNNI:   False
BMI1:      True
BMI2:      True
FMA:       True
LZCNT:     True
PCLMULQDQ: True
POPCNT:    True
SSE:       True
SSE2:      True
SSE3:      True
SSE4.1:    True
SSE4.2:    True
SSSE3:     True
X86Serialize: False

Beginning test case ConvertToVector128Int32.Double at 9/20/2022 6:34:25 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro

Ending test case at 9/20/2022 6:34:25 AM
Beginning test case ConvertToVector128Single.Double at 9/20/2022 6:34:25 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro

Ending test case at 9/20/2022 6:34:25 AM
Beginning test case ConvertToVector256Int32.Single at 9/20/2022 6:34:25 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro

Ending test case at 9/20/2022 6:34:26 AM
Beginning test case ConvertToVector256Single.Int32 at 9/20/2022 6:34:26 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro

Expected: 100
Actual: -1073740286
END EXECUTION - FAILED
FAILED
Test Harness Exitcode is : 1
To run the test:

set CORE_ROOT=C:\h\w\9881084D\p
C:\h\w\9881084D\w\BCBB09D8\e\JIT\HardwareIntrinsics\X86\Avx1\ConvertToVector_ro\ConvertToVector_ro.cmd
Expected: True
Actual:   False


Stack trace
   at JIT_HardwareIntrinsics._X86_Avx1_ConvertToVector_ro_ConvertToVector_ro_._X86_Avx1_ConvertToVector_ro_ConvertToVector_ro_cmd()
   at System.RuntimeMethodHandle.InvokeMethod(Object target, Void** arguments, Signature sig, Boolean isConstructor)
   at System.Reflection.MethodInvoker.Invoke(Object obj, IntPtr* args, BindingFlags invokeAttr)

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JitStressCLR JIT issues involving JIT internal stress modesarch-x64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMIblocking-clean-ci-optionalBlocking optional rolling runsos-windows

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