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Arm64: Better addressing mode for array access whose elements are accessed byref #67981

@kunalspathak

Description

@kunalspathak

Continuing on #64819, we should also improve the array accesses if the element is accessed using ref.

private int[] _srcData = new int[20];

public int[] Test(int m, int n, byte v)
{
    for (int i = 0; i < n; i++) {
        Consume(ref _srcData[i]);
    }
    return _srcData;
}
G_M11249_IG03:
            mov     x0, x19
            ldr     x0, [x0,#8]
            ldr     w1, [x0,#8]
            cmp     w21, w1
            bhs     G_M11249_IG06
            add     x0, x0, #16
            ubfiz   x1, x21, #2, #32   
            add     x1, x0, x1           ; <-- can compact with previous instruction?
            mov     x0, x19
            movz    x2, #0xd1ffab1e
            movk    x2, #0xd1ffab1e LSL #16
            movk    x2, #0xd1ffab1e LSL #32
            ldr     x2, [x2]
            blr     x2
            add     w21, w21, #1
            cmp     w21, w20
            blt     G_M11249_IG03

Without ref:

private int[] _srcData = new int[20];

public int[] Test(int m, int n, byte v)
{
    for (int i = 0; i < n; i++) {
        Consume(_srcData[i]);
    }
    return _srcData;
}
G_M11249_IG03:
            mov     x0, x19
            ldr     x0, [x0,#8]
            ldr     w1, [x0,#8]
            cmp     w21, w1
            bhs     G_M11249_IG06
            add     x0, x0, #16
            ldr     w1, [x0, w21, UXTW #2] ; <-- compacted
            mov     x0, x19
            movz    x2, #0xd1ffab1e
            movk    x2, #0xd1ffab1e LSL #16
            movk    x2, #0xd1ffab1e LSL #32
            ldr     x2, [x2]
            blr     x2
            add     w21, w21, #1
            cmp     w21, w20
            blt     G_M11249_IG03

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area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI

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