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arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMIoptimization
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Description
Description
We currently materialize indirection cell addresses twice for CFG checked interface calls on arm64:
Reproduction Steps
$env:COMPlus_TieredCompilation=0
$env:COMPlus_JitForceControlFlowGuard=1[MethodImpl(MethodImplOptions.NoInlining)]
public static void M(I i)
{
i.Foo();
}We produce the following code:
G_M6547_IG02: ;; offset=0008H
D280010F movz x15, #8
F2B9218F movk x15, #0xc90c LSL #16
F2CFFFCF movk x15, #0x7ffe LSL #32
F94001EF ldr x15, [x15]
94000000 bl CORINFO_HELP_VALIDATE_INDIRECT_CALL
AA0F03E1 mov x1, x15
D280010B movz x11, #8
F2B9218B movk x11, #0xc90c LSL #16
F2CFFFCB movk x11, #0x7ffe LSL #32
D63F0020 blr x1Expected behavior
We should only load the indirection cell address once.
Actual behavior
We load it twice.
Regression?
No response
Known Workarounds
No response
Configuration
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Other information
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arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMIoptimization