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xarch: Use ZF and CF flags whenever possible to eliminate test instruction #53053

@kunalspathak

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@kunalspathak

From "Appendix F Instruction Effects on RFLAGS" of AMD manual and
"Appendix A EFLAGS CROSS-REFERENCE" and "Appendix B EFLAGS CONDITION CODES" of Intel manual, there are many ALU instructions that writes ZF and CF flags. If there is a test instruction that follows such ALU instruction and it operates on same register like ALU, then we could eliminate such test instruction.

I did quick analysis and found handful of places in .NET libraries where we have such pattern and could eliminate it.

For the analysis, I just looked for following pattern:

ALU regX, regY  ; store happens in regX
TEST regX, regX
JE/JNE/JZ/JNZ label

Related discussion : #52297 (comment)

Analysis result: je_jne.txt

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area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI

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