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area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
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We frequently miss addressing mode opportunities in the JIT. Some examples I know of off-hand:
- JIT doesn't properly optimize assignment to stackalloced span elements when used as 'out' parameters #38628 (comment)
- peephole optimization for
leacommand #67187 - JIT: Add a disabled-by-default implementation of strength reduction #104243 (comment) (the example)
- Use
GetArrayDataReferenceinVector*#104532 (comment) - Avoid
Unsafe.AsinBitConverter#112616 (comment)
Frequently the problem seems like a simple one: we end up with an intervening single-def single-used LCL_VAR that we could get rid of by some form of forward substitution.
We could also consider a more advanced address mode formation pass that utilizes SSA or VN during the opts phases.
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area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI