Test

EgorBo · web-flow · commit 0f6911443e16 · 2022-01-13T11:52:22.000+03:00
diff --git a/src/coreclr/jit/lsra.cpp b/src/coreclr/jit/lsra.cpp
@@ -2808,12 +2808,13 @@ regNumber LinearScan::allocateReg(Interval*    currentInterval,
             bool wasAssigned = regSelector->foundUnassignedReg() && (assignedInterval != nullptr) &&
                                (assignedInterval->physReg == foundReg);
             unassignPhysReg(availablePhysRegRecord ARM_ARG(currentInterval->registerType));
-            if (regSelector->isMatchingConstant() && !compiler->opts.compDbgCode)
+            /*if (regSelector->isMatchingConstant() && !compiler->opts.compDbgCode)
             {
                 assert(assignedInterval->isConstant);
                 refPosition->treeNode->SetReuseRegVal();
             }
-            else if (wasAssigned)
+            else*/
+            if (wasAssigned)
             {
                 updatePreviousInterval(availablePhysRegRecord, assignedInterval, assignedInterval->registerType);
             }

Original file line number	Diff line number	Diff line change
`@@ -2808,12 +2808,13 @@ regNumber LinearScan::allocateReg(Interval* currentInterval,`
`2808`	`2808`	`bool wasAssigned = regSelector->foundUnassignedReg() && (assignedInterval != nullptr) &&`
`2809`	`2809`	`(assignedInterval->physReg == foundReg);`
`2810`	`2810`	`unassignPhysReg(availablePhysRegRecord ARM_ARG(currentInterval->registerType));`
`2811`		`- if (regSelector->isMatchingConstant() && !compiler->opts.compDbgCode)`
	`2811`	`+ /*if (regSelector->isMatchingConstant() && !compiler->opts.compDbgCode)`
`2812`	`2812`	`{`
`2813`	`2813`	`assert(assignedInterval->isConstant);`
`2814`	`2814`	`refPosition->treeNode->SetReuseRegVal();`
`2815`	`2815`	`}`
`2816`		`- else if (wasAssigned)`
	`2816`	`+ else*/`
	`2817`	`+ if (wasAssigned)`
`2817`	`2818`	`{`
`2818`	`2819`	`updatePreviousInterval(availablePhysRegRecord, assignedInterval, assignedInterval->registerType);`
`2819`	`2820`	`}`