Since RyuJIT already supports this, I think we just need these things:

• Type layout work for Vector64/Vector128/Vector256. This is basically a port of Updates Vector64<T>, Vector128<T>, and Vector256<T> to have the appropriate packing. coreclr#15961. It might look similar to Report SIMD intrinsics to RyuJIT #3678 (where I enabled Vector) [edit: This is in progress at Make it possible to align at 32 byte boundaries #6675, we need one more thing after that]
• Report the SIMD types as intrinsic types to RyuJIT
• Pass flags to RyuJIT to enable generation of SIMD code
• Either a command line switch to enable various intrinsics (program will fail if run on a CPU that doesn't support them), or ideally, function multi-versioning so that we can use the appropriate code for the CPU the program is running on at runtime