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fuzzgen: Add a few more ops#5201

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jameysharp merged 1 commit intobytecodealliance:mainfrom
afonso360:fuzz-more-ops-2
Nov 7, 2022
Merged

fuzzgen: Add a few more ops#5201
jameysharp merged 1 commit intobytecodealliance:mainfrom
afonso360:fuzz-more-ops-2

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@afonso360
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👋 Hey,

This adds bitselect,select and select_spectre_guard to the fuzzgen list of ops.

Fuzzing on x86 & AArch64 for the past couple of hours has not raised any issues.

@github-actions github-actions bot added the cranelift Issues related to the Cranelift code generator label Nov 4, 2022
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Thanks! I have some small requests and a bigger one here.

Comment on lines +726 to +780
// SelectSpectreGuard
// select_spectre_guard is only implemented on x86_64 and aarch64
// when a icmp is preceding it.
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I8, I8, I8], &[I8], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I8, I16, I16], &[I16], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I8, I32, I32], &[I32], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I8, I64, I64], &[I64], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I8, I128, I128], &[I128], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I16, I8, I8], &[I8], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I16, I16, I16], &[I16], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I16, I32, I32], &[I32], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I16, I64, I64], &[I64], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I16, I128, I128], &[I128], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I32, I8, I8], &[I8], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I32, I16, I16], &[I16], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I32, I32, I32], &[I32], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I32, I64, I64], &[I64], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I32, I128, I128], &[I128], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I64, I8, I8], &[I8], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I64, I16, I16], &[I16], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I64, I32, I32], &[I32], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I64, I64, I64], &[I64], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I64, I128, I128], &[I128], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I128, I8, I8], &[I8], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I128, I16, I16], &[I16], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I128, I32, I32], &[I32], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I128, I64, I64], &[I64], insert_opcode),
#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
(Opcode::SelectSpectreGuard, &[I128, I128, I128], &[I128], insert_opcode),
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I'm a little hesitant to add opcodes to this list where we have to disable all versions of the opcode on all of the architectures that we're actually fuzzing on. I suppose we could add an insert_select_spectre_guard function that generates an icmp first. It's not great in the long run, since I like your idea of eventually generating this table from the meta instruction definitions. But it would get us some more fuzz test coverage quickly, at least.

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@afonso360 afonso360 Nov 4, 2022

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Yeah, I don't mind adding that for now.

I didn't open issues for select_spectre_guard since I wasn't sure, but are we planning on implementing that? Or does that opcode only make sense when paired with something else?

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That's a good question! I've opened #5206 for it.

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👍 Thanks!

I've added the special insert_select_spectre_guard, and surprisingly this works for all variations of select_spectre_guard.

I'll wait for a decision to be reached on #5206 before opening the "missing lowerings" issues.

@afonso360
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🤦‍♂️ Oh I forgot to push the updated version with the links and the additionally disabled select.i128.

Adds `bitselect`,`select` and `select_spectre_guard`
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Looks great, thanks!

@jameysharp jameysharp merged commit 9814e8b into bytecodealliance:main Nov 7, 2022
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