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x64: Migrate brff and I128 branching instructions to ISLE#4599

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elliottt merged 4 commits intobytecodealliance:mainfrom
elliottt:trevor/x64-isle-br-i128
Aug 4, 2022
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x64: Migrate brff and I128 branching instructions to ISLE#4599
elliottt merged 4 commits intobytecodealliance:mainfrom
elliottt:trevor/x64-isle-br-i128

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@elliottt elliottt commented Aug 3, 2022

I changed the lowering of comparisons for I128 to always end with test instead of and or or depending on whether the context was a brz or brnz instruction. An effect of this change was that the 8-bit variants of the And and Or alu opcodes were no longer needed. The change that this introduces is visible in the i128.clif test output update.

I've also finished the migration of instructions that require floating point comparisons, and removed all the unused code that stemmed from the rust implementation of emit_fcmp. This change required adding new constructors to both SideEffectNoResults and ConsumesFlags, as the AndCondition and OrCondition constructors of FcmpCompResult both lower to two jump instructions. This could be re-implemented as two new pseudo-instructions, JmpCondAnd and JmpCondOr, if it seems like this isn't the right approach.

The test cases added in filetests/isa/x64/branches.clif were generated on the main branch, which helped with debugging the brz (fcmp ...) lowering.

@elliottt elliottt force-pushed the trevor/x64-isle-br-i128 branch from d6078dd to 7a9162b Compare August 3, 2022 20:31
@github-actions github-actions bot added cranelift Issues related to the Cranelift code generator cranelift:area:x64 Issues related to x64 codegen isle Related to the ISLE domain-specific language labels Aug 3, 2022
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github-actions bot commented Aug 3, 2022

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@elliottt elliottt force-pushed the trevor/x64-isle-br-i128 branch from 7a9162b to ddb6807 Compare August 3, 2022 20:54
@elliottt elliottt marked this pull request as ready for review August 3, 2022 21:06
@elliottt elliottt requested a review from cfallin August 3, 2022 21:06
@elliottt elliottt force-pushed the trevor/x64-isle-br-i128 branch from 400ddb2 to 7388abd Compare August 3, 2022 22:18
@elliottt elliottt marked this pull request as draft August 3, 2022 22:20
@elliottt elliottt force-pushed the trevor/x64-isle-br-i128 branch from 2d9d8e5 to 8eba11f Compare August 3, 2022 23:08
@elliottt elliottt marked this pull request as ready for review August 3, 2022 23:36
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This looks great! Happy to see emit_fcmp go away in the handwritten code finally. Just one possible simplification nit below, otherwise good to merge.

AluRmiROpcode::And8 | AluRmiROpcode::Or8 => true,
_ => false,
}
false
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Can this go away completely now (i.e. constant-prop the false outward to wherever it's called, if anywhere)?

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Definitely! I was a little unsure if removing Add8 and Or8 was desirable, so I didn't push the refactoring as far as I could have :)

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We likely won't need them for anything else I think -- the actual 8-bit ops use wider opcodes because it's more efficient microarchitecturally (no partial-register stalls) and the upper bits are don't-cares; at least or8 was only needed here because we used SETcc which only sets the lower 8. We can always add them back if we find they're needed!

@elliottt elliottt merged commit 1fc11bb into bytecodealliance:main Aug 4, 2022
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