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risc-v/bl808: Implement Timer with OpenSBI#11472

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pkarashchenko merged 1 commit intoapache:masterfrom
lupyuen2:timer
Jan 4, 2024
Merged

risc-v/bl808: Implement Timer with OpenSBI#11472
pkarashchenko merged 1 commit intoapache:masterfrom
lupyuen2:timer

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@lupyuen lupyuen commented Jan 4, 2024

Summary

The implementation of the RISC-V Timer for BL808 SoC is incomplete. This PR implements the BL808 RISC-V Timer by calling OpenSBI. The code is derived from NuttX for RISC-V QEMU.

The implementation of up_timer_initialize with OpenSBI is explained in this article.

Impact

With this PR, sleep and other Timer Functions will work correctly on BL808 SoC, instead of hanging indefinitely.

No impact on other SoCs.

Testing

We tested with ostest on Ox64 BL808 SBC:

$ tools/configure.sh ox64:nsh

Before PR

ostest hangs when accessing the RISC-V Timer:

nsh> ostest
...
ostest_main: Started user_main at PID=7
(Hang)

(NuttX Log)

After PR

ostest works correctly with the RISC-V Timer and terminates properly:

nsh> ostest
...
user_main: Exiting
ostest_main: Exiting with status -1
nsh> 

(NuttX Log)

Comment thread arch/risc-v/src/bl808/bl808_timerisr.c Outdated
Comment thread arch/risc-v/src/bl808/bl808_timerisr.c Outdated
The implementation of the RISC-V Timer for BL808 SoC is incomplete. This PR implements the BL808 RISC-V Timer by calling OpenSBI. The code is derived from NuttX for RISC-V QEMU.

The implementation of `up_timer_initialize` with OpenSBI is explained in this article: https://lupyuen.github.io/articles/nim#appendix-opensbi-timer-for-nuttx
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LGTM!

@pkarashchenko pkarashchenko merged commit 31ef9cd into apache:master Jan 4, 2024
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4 participants