risc-v/bl808: Implement Timer with OpenSBI#11472
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pkarashchenko merged 1 commit intoapache:masterfrom Jan 4, 2024
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The implementation of the RISC-V Timer for BL808 SoC is incomplete. This PR implements the BL808 RISC-V Timer by calling OpenSBI. The code is derived from NuttX for RISC-V QEMU. The implementation of `up_timer_initialize` with OpenSBI is explained in this article: https://lupyuen.github.io/articles/nim#appendix-opensbi-timer-for-nuttx
xiaoxiang781216
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Jan 4, 2024
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Summary
The implementation of the RISC-V Timer for BL808 SoC is incomplete. This PR implements the BL808 RISC-V Timer by calling OpenSBI. The code is derived from NuttX for RISC-V QEMU.
The implementation of
up_timer_initializewith OpenSBI is explained in this article.Impact
With this PR,
sleepand other Timer Functions will work correctly on BL808 SoC, instead of hanging indefinitely.No impact on other SoCs.
Testing
We tested with
osteston Ox64 BL808 SBC:Before PR
ostesthangs when accessing the RISC-V Timer:(NuttX Log)
After PR
ostestworks correctly with the RISC-V Timer and terminates properly:(NuttX Log)