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[BUG] Erratic behavior with multiple race conditions #466

@Zhatt-0

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@Zhatt-0

I'm working on a 16-bit counter made with just NAND gates to be more efficient, but I ran into issues with the exposed flip-flops. It seems on larger chips the flip flops will sometimes glitch and flicker.

Image

In the image above the two chips above are essentially the same. The only difference is on chip B, the JK Flip-Flops are nested in their own chips. Chip B functions properly every time.

Chip A will sometimes work, but will regularly fail in a different place each time it is loaded. One of the flip flops will stop functioning and fail to load a value. For example, the 4th bit might constantly reset itself so the chip can't count past 7. After re-loading the chip, the 4th bit might work fine, but the 5th will fail. The flip flops are clock synchronized on both chips, so the race condition alone shouldn't case them to fail.

Adding more steps per clock cycle helps a bit, but doesn't always clear the issue. Chip B will run reliably even at 2 steps per clock. Chip A will continue to fail in the high 100's.

I assume this is because the program running the simulation inside each flip-flop chip as a separate instance, instead of simulating the entire daisy chained sequence all at once. This might simply be a limitation of the program, but I thought I'd share my experiment.

You can download both chips here.
Pink resets the chip, yellow loads a number from the data input, and blue enables counting.
(Chip B can have some minor errors when toggling the inputs that I haven't de-bugged yet, but this was just for testing.)

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