RED-176382 Fix FT.CREATE failure with LeanVec parameters on non-Intel architectures (#7344)

meiravgri · web-flow · commit 2c35686fcadd · 2025-11-12T17:26:00.000Z
* move  isLVQSupported() to info
remove isLVQSupportedfrom VecSim_IsLeanVecCompressionType
expose isLVQSupported

add , 'LeanVec4x8' to test_vecsim_svs:test_svs_vamana_info

* add reduce
diff --git a/src/info/info_command.c b/src/info/info_command.c
@@ -200,7 +200,7 @@ void fillReplyWithIndexInfo(RedisSearchCtx* sctx, RedisModule_Reply *reply, bool
           REPLY_KVSTR("compression", VecSimSvsCompression_ToString(svs_params.quantBits));
           if (svs_params.quantBits != VecSimSvsQuant_NONE) {
             REPLY_KVINT("training_threshold", algo_params.tieredParams.specificParams.tieredSVSParams.trainingTriggerThreshold);
-            if (VecSim_IsLeanVecCompressionType(svs_params.quantBits)) {
+            if (isLVQSupported() && VecSim_IsLeanVecCompressionType(svs_params.quantBits)) {
               REPLY_KVINT("reduced_dim", svs_params.leanvec_dim);
             }
           }
diff --git a/src/vector_index.c b/src/vector_index.c
@@ -21,7 +21,7 @@
 #define CPUID_AVAILABLE 1
 #endif
 
-static bool isLVQSupported() {
+bool isLVQSupported() {
 
 #if defined(CPUID_AVAILABLE) && BUILD_INTEL_SVS_OPT
   // Check if the machine is Intel based on the CPU vendor.
@@ -298,7 +298,7 @@ const char *VecSimAlgorithm_ToString(VecSimAlgo algo) {
 }
 
 bool VecSim_IsLeanVecCompressionType(VecSimSvsQuantBits quantBits) {
-  return isLVQSupported() && (quantBits == VecSimSvsQuant_4x8_LeanVec || quantBits == VecSimSvsQuant_8x8_LeanVec);
+  return quantBits == VecSimSvsQuant_4x8_LeanVec || quantBits == VecSimSvsQuant_8x8_LeanVec;
 }
 
 const char *VecSimSvsCompression_ToString(VecSimSvsQuantBits quantBits) {
diff --git a/src/vector_index.h b/src/vector_index.h
@@ -165,6 +165,7 @@ const char *VecSimAlgorithm_ToString(VecSimAlgo algo);
 const char *VecSimSvsCompression_ToString(VecSimSvsQuantBits quantBits);
 const char *VecSimSearchHistory_ToString(VecSimOptionMode option);
 bool VecSim_IsLeanVecCompressionType(VecSimSvsQuantBits quantBits);
+bool isLVQSupported();
 
 VecSimMetric getVecSimMetricFromVectorField(const FieldSpec *vectorField);
 
diff --git a/tests/pytests/test_vecsim_svs.py b/tests/pytests/test_vecsim_svs.py
@@ -156,12 +156,14 @@ def test_svs_vamana_info():
     data_type = random.choice(VECSIM_SVS_DATA_TYPES)
 
     # Create SVS VAMANA index with all compression flavors (except for global SQ8).
-    compression_types = SVS_COMPRESSION_TYPES if is_intel_opt_enabled() and EXTENDED_PYTESTS else ['NO_COMPRESSION', 'LVQ8']
+    compression_types = SVS_COMPRESSION_TYPES if is_intel_opt_enabled() and EXTENDED_PYTESTS else ['NO_COMPRESSION', 'LVQ8', 'LeanVec4x8']
     for compression_type in compression_types:
         cmd_params = ['TYPE', data_type,
                     'DIM', dim, 'DISTANCE_METRIC', 'L2']
         if compression_type != 'NO_COMPRESSION':
             cmd_params.extend(['COMPRESSION', compression_type])
+            if compression_type == 'LeanVec4x8':
+                cmd_params.extend(['REDUCE', dim // 2])
         env.expect('FT.CREATE', 'idx', 'SCHEMA', 'v', 'VECTOR', 'SVS-VAMANA', len(cmd_params), *cmd_params).ok()
 
         # Validate that ft.info returns the default params for SVS VAMANA, along with compression

Original file line number	Diff line number	Diff line change
`@@ -200,7 +200,7 @@ void fillReplyWithIndexInfo(RedisSearchCtx* sctx, RedisModule_Reply *reply, bool`
`200`	`200`	`REPLY_KVSTR("compression", VecSimSvsCompression_ToString(svs_params.quantBits));`
`201`	`201`	`if (svs_params.quantBits != VecSimSvsQuant_NONE) {`
`202`	`202`	`REPLY_KVINT("training_threshold", algo_params.tieredParams.specificParams.tieredSVSParams.trainingTriggerThreshold);`
`203`		`- if (VecSim_IsLeanVecCompressionType(svs_params.quantBits)) {`
	`203`	`+ if (isLVQSupported() && VecSim_IsLeanVecCompressionType(svs_params.quantBits)) {`
`204`	`204`	`REPLY_KVINT("reduced_dim", svs_params.leanvec_dim);`
`205`	`205`	`}`
`206`	`206`	`}`
Original file line number	Diff line number	Diff line change
`@@ -21,7 +21,7 @@`
`21`	`21`	`#define CPUID_AVAILABLE 1`
`22`	`22`	`#endif`
`23`	`23`
`24`		`-static bool isLVQSupported() {`
	`24`	`+bool isLVQSupported() {`
`25`	`25`
`26`	`26`	`#if defined(CPUID_AVAILABLE) && BUILD_INTEL_SVS_OPT`
`27`	`27`	`// Check if the machine is Intel based on the CPU vendor.`
`@@ -298,7 +298,7 @@ const char *VecSimAlgorithm_ToString(VecSimAlgo algo) {`
`298`	`298`	`}`
`299`	`299`
`300`	`300`	`bool VecSim_IsLeanVecCompressionType(VecSimSvsQuantBits quantBits) {`
`301`		`- return isLVQSupported() && (quantBits == VecSimSvsQuant_4x8_LeanVec \|\| quantBits == VecSimSvsQuant_8x8_LeanVec);`
	`301`	`+ return quantBits == VecSimSvsQuant_4x8_LeanVec \|\| quantBits == VecSimSvsQuant_8x8_LeanVec;`
`302`	`302`	`}`
`303`	`303`
`304`	`304`	`const char *VecSimSvsCompression_ToString(VecSimSvsQuantBits quantBits) {`