cpu/stm32f1: reworked clock initialization code#6970
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kYc0o
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Some very small comments which are not important.
I tested with OTA and works as is.
So, ACK.
cpu/stm32f1/stmclk.c
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| RCC->CFGR &= ~(RCC_CFGR_SW); | ||
| while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) {} | ||
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| /* its save now to program the flash wait states */ |
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I don't really get this comment... maybe it was misspelled?
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spellings seems correct. Meaning: say you had a (fast) PLL configured as clock in the bootloader, but want to switch to some significant slower clock in some image you boot into. Then you would break the code if you would reprogram the flash wait states to some slower value while the PLL is still driving the system. But now that we switched to the HSI as system clock, we can program the flash wait states to whatever we like without breaking anything...
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So there's a typo in the comment: save => safe
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ähh yap, should clean my glasses... sorry.
| /* the actual PLL values are automatically generated */ | ||
| **/ | ||
| /* high speed clock configuration: | ||
| * 0 := use internal HSI oscillator (alway 8MHz) |
| /* the actual PLL values are automatically generated */ | ||
| **/ | ||
| /* high speed clock configuration: | ||
| * 0 := use internal HSI oscillator (alway 8MHz) |
| /* configuration of PLL prescaler and multiply values */ | ||
| /* CORECLOCK := CLOCK_SOURCE / PLL_DIV * PLL_MUL */ | ||
| /* high speed clock configuration: | ||
| * 0 := use internal HSI oscillator (alway 8MHz) |
boards/fox/include/periph_conf.h
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| /* configuration of PLL prescaler and multiply values */ | ||
| /* CORECLOCK := CLOCK_SOURCE / PLL_DIV * PLL_MUL */ | ||
| /* high speed clock configuration: | ||
| * 0 := use internal HSI oscillator (alway 8MHz) |
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addressed comments and squashed. |
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Go then! |
This PR improves the clock initialization for the STM32F1 in many ways:
The goal of the common clock handling interface is to implement it for each of the STM32 CPUs. With this then we can (i) move the
cpu.cfiles into the commonstm32_commontree, and (ii) use the low-freq clock functions for RTC etc.