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boards/nucleo32-f303 : initial support#6377

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miri64 merged 4 commits intoRIOT-OS:masterfrom
aabadie:nucleo32-f303
Jan 19, 2017
Merged

boards/nucleo32-f303 : initial support#6377
miri64 merged 4 commits intoRIOT-OS:masterfrom
aabadie:nucleo32-f303

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@aabadie aabadie commented Jan 16, 2017 •
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Adds support for another nucleo-32 board with a stm32f303k8 MCU (16k RAM, 64k Flash).

I configured the system clock to 64MHz which is different from what the datatsheet says (72MHz) but works.

Otherwise the actual configuration has:

  • 1 32 bits timer (TIM2)
  • 2 UARTs : one on USB and one on D0/D1
  • 3 pins with PWM (D3, D6, D9)
  • 5 ADC (A0, A1, A3, A4, A7) (ADC is not supported yet by stm32f3 family)

@aabadie aabadie added Platform: ARM Platform: This PR/issue effects ARM-based platforms Type: new feature The issue requests / The PR implemements a new feature for RIOT labels Jan 16, 2017
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aabadie commented Jan 16, 2017 •
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As a side note, I called the board nucleo32-f303 because of a name clash with the already supported nucleo-f303 (which is a nucleo-64 board).
Maybe I should open an issue where we can discuss what's the best strategy to use for naming those boards (nucleo-144 also exists).

@aabadie aabadie force-pushed the nucleo32-f303 branch 7 times, most recently from 8a22966 to cfbd137 Compare January 18, 2017 17:06
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astralien3000 commented Jan 18, 2017

Hello, I have tested this PR with :
test/periph_uart
test/periph_timer
example/default

Everything is OK for these tests.

But for test/periph_pwm: PWM on D3 and D6 don't work

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aabadie commented Jan 18, 2017 •
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Thanks @astralien3000 for having a look.

Although I'm sure it was working, I probably made a mistake when updating the configuration following #6393.

haukepetersen
haukepetersen requested changes Jan 18, 2017
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untested ACK once comments are addressed

boards/nucleo32-f303/include/board.h
extern "C" {
#endif

#define LED0_PIN GPIO_PIN(PORT_B, 3)
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you could spend some doxygen around the pin config block

boards/nucleo32-f303/include/periph_conf.h Outdated
.chan = { { .pin = GPIO_UNDEF, .cc_chan = 0 },
{ .pin = GPIO_UNDEF, .cc_chan = 0 },
{ .pin = GPIO_PIN(PORT_B, 0) /* D3 */, .cc_chan = 2 },
{ .pin = GPIO_PIN(PORT_B, 1) /* D6 */, .cc_chan = 3 } },
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the ordering is wrong (and this is probably why it is not working): the undefined channels have to be at the end of the array (so the configured logical channels are set from index 0 on):

        .chan     = { { .pin = GPIO_PIN(PORT_B, 0),                   .cc_chan = 2 },
                      { .pin = GPIO_PIN(PORT_B, 1),                   .cc_chan = 3 },
                      { .pin =  GPIO_UNDEF, .cc_chan = 0 },
                      { .pin =  GPIO_UNDEF, .cc_chan = 0 } },

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aabadie commented Jan 18, 2017

Comments addressed @haukepetersen. Will test again the PWMs tomorrow with @astralien3000.

@aabadie aabadie mentioned this pull request Jan 18, 2017
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@haukepetersen haukepetersen added the CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR label Jan 18, 2017
@aabadie aabadie force-pushed the nucleo32-f303 branch 2 times, most recently from 85f2698 to 80be393 Compare January 19, 2017 08:44
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aabadie commented Jan 19, 2017

Wait, before merging, I made a mistake and reverted the commits that were addressing @haukepetersen 's comments.

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miri64 commented Jan 19, 2017

Wait, before merging, I made a mistake and reverted the commits that were addressing @haukepetersen 's comments.

Are they fixed now?

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aabadie commented Jan 19, 2017

Are they fixed now?

Yes but I'd like @astralien3000, to give it a try again first.

@aabadie aabadie added this to the Release 2017.01 milestone Jan 19, 2017
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astralien3000 commented Jan 19, 2017

Everything is OK, test/periph_pwm is now working, and the previous are still working.

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miri64 commented Jan 19, 2017

Then go

@miri64 miri64 merged commit 8ba057d into RIOT-OS:master Jan 19, 2017
@aabadie aabadie deleted the nucleo32-f303 branch March 6, 2017 12:00
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@haukepetersen haukepetersen haukepetersen approved these changes

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