cpu/esp32/periph/spi: migration to ESP-IDF v5.4

gschorcht · gschorcht · commit fe8967b8e6c4 · 2025-05-28T17:55:42.000+02:00
diff --git a/cpu/esp32/periph/spi.c b/cpu/esp32/periph/spi.c
@@ -26,6 +26,10 @@
  * @}
  */
 
+/* -Wsign-compare has to be deactivated in this file due to the comparison
+ * of int and size_t in spi_ll.h of the ESP-IDF */
+#pragma GCC diagnostic ignored "-Wsign-compare"
+
 #include <assert.h>
 #include <string.h>
 
@@ -38,8 +42,9 @@
 #include "periph/spi.h"
 #include "syscalls.h"
 
-#include "driver/periph_ctrl.h"
 #include "esp_attr.h"
+#include "esp_cpu.h"
+#include "esp_private/periph_ctrl.h"
 #include "esp_rom_gpio.h"
 #include "hal/spi_hal.h"
 #include "hal/spi_types.h"
@@ -97,6 +102,15 @@ _Static_assert(SPI_NUMOF == ARRAY_SIZE(_spi),
 _Static_assert(SPI_NUMOF <= SPI_NUMOF_MAX,
                "Number of defined SPI devices is greater than the number of supported devices");
 
+#define PERIPH_SPI1_MODULE  PERIPH_SPI_MODULE
+#if defined(CPU_FAM_ESP32)
+#  define PERIPH_SPI2_MODULE  PERIPH_HSPI_MODULE
+#  define PERIPH_SPI3_MODULE  PERIPH_VSPI_MODULE
+#elif defined(CPU_FAM_ESP32S2)
+#  define PERIPH_SPI2_MODULE  PERIPH_FSPI_MODULE
+#  define PERIPH_SPI3_MODULE  PERIPH_HSPI_MODULE
+#endif
+
 void IRAM_ATTR spi_init(spi_t bus)
 {
     DEBUG("%s bus=%u\n", __func__, bus);
@@ -117,10 +131,27 @@ void IRAM_ATTR spi_init(spi_t bus)
     }
 
     /* enable (power on) the according SPI module */
-    periph_module_enable(_spi[bus].periph->module);
+    if (spi_config[bus].ctrl == SPI1_HOST) {
+        periph_module_enable(PERIPH_SPI1_MODULE);
+    }
+#if SOC_SPI_PERIPH_NUM > 1
+    else if (spi_config[bus].ctrl == SPI2_HOST) {
+        periph_module_enable(PERIPH_SPI2_MODULE);
+    }
+#endif
+#if SOC_SPI_PERIPH_NUM > 2
+    else if (spi_config[bus].ctrl == SPI3_HOST) {
+        periph_module_enable(PERIPH_SPI3_MODULE);
+    }
+#endif
+    else {
+        assert(false);
+    }
 
     /* initialize SPI peripheral */
     spi_ll_master_init(_spi[bus].periph->hw);
+    spi_ll_set_mosi_delay(_spi[bus].periph->hw, 0, 0);
+    spi_ll_apply_config(_spi[bus].periph->hw);
 
     /* bring the bus into a defined state (one-line mode) */
     spi_ll_master_set_line_mode(_spi[bus].periph->hw, (spi_line_mode_t){ 1, 1, 1 });
@@ -332,6 +363,7 @@ void IRAM_ATTR spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t cl
     }
     spi_ll_master_set_clock_by_reg(_spi[bus].periph->hw,
                                    &_spi[bus].timing.clock_reg);
+    spi_ll_apply_config(_spi[bus].periph->hw);
 
 #if defined(CPU_FAM_ESP32C3) || defined(CPU_FAM_ESP32S3)
     /*
@@ -417,7 +449,8 @@ static void IRAM_ATTR _spi_transfer(uint8_t bus,
     spi_ll_write_buffer(_spi[bus].periph->hw, out ? out : _spi_empty_out, len << 3);
 
     /* start the transfer */
-    spi_ll_master_user_start(_spi[bus].periph->hw);
+    spi_ll_apply_config(_spi[bus].periph->hw);
+    spi_ll_user_start(_spi[bus].periph->hw);
 
     /* wait until the transfer is finished */
     while (spi_ll_get_running_cmd(_spi[bus].periph->hw)) {}
