cpu/sam3: optimize gpio ISR processing

dylad · dylad · commit 193390bbdd17 · 2025-01-31T10:24:34.000+01:00
Signed-off-by: dylad &lt;dylan.laduranty@mesotic.com&gt;
diff --git a/cpu/sam3/periph/gpio.c b/cpu/sam3/periph/gpio.c
@@ -22,6 +22,7 @@
  * @}
  */
 
+#include "bitarithm.h"
 #include "cpu.h"
 #include "periph/gpio.h"
 #include "periph_conf.h"
@@ -313,11 +314,11 @@ static inline void isr_handler(Pio *port, int port_num)
     /* take interrupt flags only from pins which interrupt is enabled */
     uint32_t status = (port->PIO_ISR & port->PIO_IMR);
 
-    for (int i = 0; i < 32; i++) {
-        if (status & ((uint32_t)1 << i)) {
-            int ctx = _ctx(port_num, i);
-            exti_ctx[ctx].cb(exti_ctx[ctx].arg);
-        }
+    while (status) {
+        uint8_t pin_number;
+        status = bitarithm_test_and_clear(status, &pin_number);
+        int ctx = _ctx(port_num, pin_number);
+        exti_ctx[ctx].cb(exti_ctx[ctx].arg);
     }
     cortexm_isr_end();
 }
