replace mfence with lock'ed inst on x86#48123
Conversation
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This seems to be fine, linux changed to this a little while ago https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=450cbdd0125cfa5d7bbf9e2a6b6961cc48d29730 |
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Looks like LLVM has support to emit this since https://reviews.llvm.org/D58632 and even emits it in the fallback case when the processor has no mfence. I don't know why it still emits mfence for the llvm |
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@d-netto want to submit an upstream PR to remove the mfence case to see what they think? |
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I believe @vchuravy already submitted a patch to LLVM to replace the |
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Ah indeed: https://reviews.llvm.org/D129947 |
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I may possibly say we should rather just wait for that to catch up with gcc and https://reviews.llvm.org/D129947, than worry about maintaining this if something changes again |
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It will take a long time for the compilers to catch up. It landed in GCC12 and it will be a second before we get it into Clang. |
A dummy instruction with
lockprefix should provide the same sequential consistency guarantees as anmfenceonx86.This had a large performance impact when benchmarking work-stealing queues for parallel marking and it would be interesting to see how/if it affects performance in general.
CC: @vchuravy