Skip to main content

Advertisement

Springer Nature Link
Log in
Menu
Find a journal Publish with us Track your research
Search
Saved research
Cart
  1. Home
  2. Compiler Construction
  3. Conference paper

Selective Runtime Memory Disambiguation in a Dynamic Binary Translator

  • Conference paper
  • pp 65–79
  • Cite this conference paper
Compiler Construction (CC 2006)
Selective Runtime Memory Disambiguation in a Dynamic Binary Translator
  • Bolei Guo18,
  • Youfeng Wu19,
  • Cheng Wang19,
  • Matthew J. Bridges18,
  • Guilherme Ottoni18,
  • Neil Vachharajani18,
  • Jonathan Chang18 &
  • …
  • David I. August18 

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 3923))

Included in the following conference series:

  • International Conference on Compiler Construction
  • 1428 Accesses

  • 7 Citations

Abstract

Alias analysis, traditionally performed statically, is unsuited for a dynamic binary translator (DBT) due to incomplete control-flow information and the high complexity of an accurate analysis. Whole- program profiling, however, shows that most memory references do not alias. The current technique used in DBTs to disambiguate memory references, instruction inspection, is too simple and can only disambiguate one-third of potential aliases. To achieve effective memory disambiguation while keeping a tight bound on analysis overhead, we propose an efficient heuristic algorithm that strategically selects key memory dependences to disambiguate with runtime checks. These checks have little runtime overhead and, in the common case where aliasing does not occur, enable aggressive optimizations, particularly scheduling. We demonstrate that a small number of checks, inserted with a low-overhead analysis, can approach optimal scheduling, where all false memory dependences are removed. Simulation shows that better scheduling alone improves overall performance by 5%.

Download to read the full chapter text

Chapter PDF

Similar content being viewed by others

C++ Memory Check tool based on Dynamic Binary Instrumentation Platform

Chapter © 2017

Memory access integrity: detecting fine-grained memory access errors in binary code

Article Open access 07 June 2019

Lightweight memory tracing for hot data identification

Article 04 June 2020

Explore related subjects

Discover the latest articles, books and news in related subjects, suggested using machine learning.
  • Algorithms
  • Compilers and Interpreters
  • Data Structures
  • Machine Translation
  • Register-Transfer-Level Implementation
  • Targeted resequencing
  • Static Program Analysis Techniques for Software Systems

References

  1. Cheng, B.-C., Hwu, W.W.: Modular interprocedural pointer analysis using access paths: design, implementation, and evaluation. In: ACM SIGPLAN Conference on Programming Language Design and Implementation, pp. 57–69 (2000)

    Google Scholar 

  2. Landi, W., Ryder, B.G.: A safe approximate algorithm for interprocedural pointer aliasing. In: Proceedings of the ACM SIGPLAN 1992 Conference on Programming Language Design and Implementation, pp. 235–248 (June 1992)

    Google Scholar 

  3. Bala, V., Deusterwald, E., Banerjia, S.: Transparent dynamic optimization. Tech. Rep. HPL-1999-77, Hewlett Packard Labs (June 1999)

    Google Scholar 

  4. Dehnert, J.C., Grant, B.K., Banning, J.P.: The transmeta code morphing software: using speculation, recovery and adaptive retranslation to address real-life challenges. In: Proceedings of the 1st International Symposium on Code Generation and Optimization, pp. 15–24 (March 2003)

    Google Scholar 

  5. Ebcioglu, K., Altman, E.R.: DAISY: Dynamic compilation for 100% architectural compatibility. In: Proceedings of the 24th International Symposium on Computer Architecture (June 1997)

    Google Scholar 

  6. Nicolau, A.: Run-time disambiguation: Coping with statically unpredictable dependences. IEEE Transactions on Computers 38, 663–678 (1989)

    Article  Google Scholar 

  7. Huang, A.S., Slavengurg, G., Shen, J.P.: Speculative disambiguation: A compilation technique for dynamic memory disambiguation. ACM SIGARCH Computer Architecture News Archive 22, 200–210 (1994)

    Article  Google Scholar 

  8. Fernandez, M., Espasa, R.: Speculative alias analysis for executable code. In: Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques, September 2002, pp. 222–231 (2002)

    Google Scholar 

  9. Amme, W., Braun, P., Zehendner, E.: Data dependence analysis of assembly code. Tech. Rep. 3764, INRIA, Rocquencourt, France (September 1999)

    Google Scholar 

  10. Fisher, J.A.: Trace scheduling: A technique for global microcode compaction. IEEE Transactions on Computers C-30, 478–490 (1981)

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Department of Computer Science, Princeton University, USA

    Bolei Guo, Matthew J. Bridges, Guilherme Ottoni, Neil Vachharajani, Jonathan Chang & David I. August

  2. Programming Systems Lab, Intel Corporation, USA

    Youfeng Wu & Cheng Wang

Authors
  1. Bolei Guo
    View author publications

    Search author on:PubMed Google Scholar

  2. Youfeng Wu
    View author publications

    Search author on:PubMed Google Scholar

  3. Cheng Wang
    View author publications

    Search author on:PubMed Google Scholar

  4. Matthew J. Bridges
    View author publications

    Search author on:PubMed Google Scholar

  5. Guilherme Ottoni
    View author publications

    Search author on:PubMed Google Scholar

  6. Neil Vachharajani
    View author publications

    Search author on:PubMed Google Scholar

  7. Jonathan Chang
    View author publications

    Search author on:PubMed Google Scholar

  8. David I. August
    View author publications

    Search author on:PubMed Google Scholar

Editor information

Editors and Affiliations

  1. Computer Laboratory, University of Cambridge, 15 JJ Thomson Avenue, CB3 0FD, Cambridge, UK

    Alan Mycroft

  2. Saarland University, Germany

    Andreas Zeller

Rights and permissions

Reprints and permissions

Copyright information

© 2006 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Guo, B. et al. (2006). Selective Runtime Memory Disambiguation in a Dynamic Binary Translator. In: Mycroft, A., Zeller, A. (eds) Compiler Construction. CC 2006. Lecture Notes in Computer Science, vol 3923. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11688839_6

Download citation

  • .RIS
  • .ENW
  • .BIB
  • DOI: https://doi.org/10.1007/11688839_6

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-33050-9

  • Online ISBN: 978-3-540-33051-6

  • eBook Packages: Computer ScienceComputer Science (R0)Springer Nature Proceedings Computer Science

Share this paper

Anyone you share the following link with will be able to read this content:

Sorry, a shareable link is not currently available for this article.

Provided by the Springer Nature SharedIt content-sharing initiative

Keywords

  • Heuristic Algorithm
  • Critical Path
  • Memory Reference
  • Memory Instruction
  • Base Address

These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Publish with us

Policies and ethics

Search

Navigation

  • Find a journal
  • Publish with us
  • Track your research

Footer Navigation

Discover content

  • Journals A-Z
  • Books A-Z

Publish with us

  • Journal finder
  • Publish your research
  • Language editing
  • Open access publishing

Products and services

  • Our products
  • Librarians
  • Societies
  • Partners and advertisers

Our brands

  • Springer
  • Nature Portfolio
  • BMC
  • Palgrave Macmillan
  • Apress
  • Discover

Corporate Navigation

  • Your US state privacy rights
  • Accessibility statement
  • Terms and conditions
  • Privacy policy
  • Help and support
  • Legal notice
  • Cancel contracts here

162.0.217.198

Not affiliated

Springer Nature

© 2026 Springer Nature