An 8-bit 1.8 V 500 MS/s CMOS DAC with a novel four-stage current steering architecture.

Santanu Sarkar 0002 Ravi Sankar Prasad Sanjoy Kumar Dey Vinay Belde Swapna Banerjee An 8-bit 1.8 V 500 MS/s CMOS DAC with a novel four-stage current steering architecture. 149-152 2008 ISCAS https://doi.org/10.1109/ISCAS.2008.4541376 conf/iscas/2008 db/conf/iscas/iscas2008.html#SarkarPDBB08