The Reduceron: Widening the von Neumann Bottleneck for Graph Reduction Using an FPGA.

Matthew Naylor Colin Runciman The Reduceron: Widening the von Neumann Bottleneck for Graph Reduction Using an FPGA. 129-146 2007 IFL https://doi.org/10.1007/978-3-540-85373-2_8 conf/ifl/2007 db/conf/ifl/ifl2007.html#NaylorR07