<?xml version="1.0" encoding="US-ASCII"?>
<dblp>
<inproceedings key="conf/asscc/AthmanathanSCKA14" mdate="2017-05-24">
<author>Aravinthan Athmanathan</author>
<author>Milos Stanisavljevic</author>
<author>Junho Cheon</author>
<author>Seokjoon Kang</author>
<author>Changyong Ahn</author>
<author>Junghyuk Yoon</author>
<author>Min-Chul Shin</author>
<author>Taekseung Kim</author>
<author>Nikolaos Papandreou</author>
<author>Haris Pozidis</author>
<author>Evangelos Eleftheriou</author>
<title>A 6-bit drift-resilient readout scheme for multi-level Phase-Change Memory.</title>
<pages>137-140</pages>
<year>2014</year>
<booktitle>A-SSCC</booktitle>
<ee>https://doi.org/10.1109/ASSCC.2014.7008879</ee>
<crossref>conf/asscc/2014</crossref>
<url>db/conf/asscc/asscc2014.html#AthmanathanSCKA14</url>
</inproceedings></dblp>
