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<r><inproceedings key="conf/icecsys/KhayyariCPAMCMRN25" mdate="2026-01-16">
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<author pid="395/0419">Noemie Couzi</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="69/2315">Hassen Aziza</author>
<author pid="71/10782">Abderrezak Marzaki</author>
<author pid="423/9158">Fran&#231;ois Courbin</author>
<author pid="39/1544">Alexandre Malherbe</author>
<author pid="125/3201">Arnaud R&#233;gnier</author>
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<title>Polysilicon PIN diode characterization and scaling in low-cost 40nm technology for IoT applications.</title>
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<r><inproceedings key="conf/dttis/CouziPAMMN24" mdate="2025-01-16">
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<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="69/2315">Hassen Aziza</author>
<author pid="39/1544">Alexandre Malherbe</author>
<author pid="71/10782">Abderrezak Marzaki</author>
<author pid="165/6693">Stephan Niel</author>
<title>Optimization of digital transistors for low-cost and low-power IoT applications in 40nm technology.</title>
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<booktitle>DTTIS</booktitle>
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<r><inproceedings key="conf/latw/AzizaPFHXTCR24" mdate="2025-03-03">
<author pid="69/2315">Hassen Aziza</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author orcid="0000-0002-9782-393X" pid="218/3076">Moritz Fieback</author>
<author pid="75/4940">Said Hamdioui</author>
<author orcid="0009-0000-5555-595X" pid="348/7602">Hanzhi Xun</author>
<author pid="73/9056">Mottaqiallah Taouil</author>
<author pid="96/11469">Karine Couli&#233;</author>
<author pid="81/10534">Wenceslas Rahajandraibe</author>
<title>Analysis of Conductance Variability in RRAM for Accurate Neuromorphic Computing.</title>
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<booktitle>LATS</booktitle>
<ee>https://doi.org/10.1109/LATS62223.2024.10534620</ee>
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<url>db/conf/latw/lats2024.html#AzizaPFHXTCR24</url>
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<r><inproceedings key="conf/iscas/AzizaPBMH22" mdate="2025-03-03">
<author pid="69/2315">Hassen Aziza</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="261/0364">Hussein Bazzi</author>
<author orcid="0000-0002-2332-4273" pid="89/10395">Mathieu Moreau</author>
<author pid="15/9430">Adnan Harb</author>
<title>STATE: A Test Structure for Rapid Prediction of Resistive RAM Electrical Parameter Variability.</title>
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<year>2022</year>
<booktitle>ISCAS</booktitle>
<ee>https://doi.org/10.1109/ISCAS48785.2022.9937716</ee>
<crossref>conf/iscas/2022</crossref>
<url>db/conf/iscas/iscas2022.html#AzizaPBMH22</url>
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<r><inproceedings key="conf/dtis/MatteoSMCPR21" mdate="2023-09-30">
<author orcid="0000-0003-1250-580X" pid="299/5314">Franck Matteo</author>
<author pid="299/4790">Roberto Simola</author>
<author pid="299/5432">Franck Melul</author>
<author pid="96/11469">Karine Couli&#233;</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="125/3201">Arnaud R&#233;gnier</author>
<title>Simulation of state of the art EEPROM programming window closure during endurance degradation.</title>
<pages>1-5</pages>
<year>2021</year>
<booktitle>DTIS</booktitle>
<ee>https://doi.org/10.1109/DTIS53253.2021.9505085</ee>
<crossref>conf/dtis/2021</crossref>
<url>db/conf/dtis/dtis2021.html#MatteoSMCPR21</url>
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<r><inproceedings key="conf/dft/BazziPAMH20" mdate="2022-12-07">
<author pid="261/0364">Hussein Bazzi</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="69/2315">Hassen Aziza</author>
<author orcid="0000-0002-2332-4273" pid="89/10395">Mathieu Moreau</author>
<author pid="15/9430">Adnan Harb</author>
<title>Resistive RAM SET and RESET Switching Voltage Evaluation as an Entropy Source for Random Number Generation.</title>
<pages>1-4</pages>
<year>2020</year>
<booktitle>DFT</booktitle>
<ee>https://doi.org/10.1109/DFT50435.2020.9250726</ee>
<crossref>conf/dft/2020</crossref>
<url>db/conf/dft/dft2020.html#BazziPAMH20</url>
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<r><inproceedings key="conf/dtis/AzizaBPCMH19" mdate="2020-06-15">
<author pid="69/2315">Hassen Aziza</author>
<author pid="261/0364">Hussein Bazzi</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="97/6342">Pierre Canet</author>
<author orcid="0000-0002-2332-4273" pid="89/10395">Mathieu Moreau</author>
<author pid="15/9430">Adnan Harb</author>
<title>An Augmented OxRAM Synapse for Spiking Neural Network (SNN) Circuits.</title>
<pages>1-5</pages>
<year>2019</year>
<booktitle>DTIS</booktitle>
<ee>https://doi.org/10.1109/DTIS.2019.8735057</ee>
<crossref>conf/dtis/2019</crossref>
<url>db/conf/dtis/dtis2019.html#AzizaBPCMH19</url>
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<r><inproceedings key="conf/iolts/Kharbouche-Harrari19" mdate="2021-12-24">
<author pid="227/4672">Mounia Kharbouche-Harrari</author>
<author pid="61/11031">Romain Wacquez</author>
<author pid="61/3518">Gregory di Pendina</author>
<author pid="91/7973">Jean-Max Dutertre</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="124/8509">Driss Aboulkassimi</author>
<author pid="08/4890">Jean-Michel Portal</author>
<title>Dual Detection of Heating and Photocurrent attacks (DDHP) Sensor using Hybrid CMOS/STT-MRAM.</title>
<pages>322-327</pages>
<year>2019</year>
<booktitle>IOLTS</booktitle>
<ee>https://doi.org/10.1109/IOLTS.2019.8854374</ee>
<crossref>conf/iolts/2019</crossref>
<url>db/conf/iolts/iolts2019.html#Kharbouche-Harrari19</url>
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<r><inproceedings key="conf/iscas/Kharbouche-Harrari19" mdate="2021-12-24">
<author pid="227/4672">Mounia Kharbouche-Harrari</author>
<author pid="61/3518">Gregory di Pendina</author>
<author pid="61/11031">Romain Wacquez</author>
<author pid="77/7072">Bernard Dieny</author>
<author pid="124/8509">Driss Aboulkassimi</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="08/4890">Jean-Michel Portal</author>
<title>Light-Weight Cipher Based on Hybrid CMOS/STT-MRAM: Power/Area Analysis.</title>
<pages>1-5</pages>
<year>2019</year>
<booktitle>ISCAS</booktitle>
<ee>https://doi.org/10.1109/ISCAS.2019.8702734</ee>
<crossref>conf/iscas/2019</crossref>
<url>db/conf/iscas/iscas2019.html#Kharbouche-Harrari19</url>
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<r><inproceedings key="conf/nvmts/Postel-Pellerin19" mdate="2020-06-15">
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="261/0364">Hussein Bazzi</author>
<author pid="69/2315">Hassen Aziza</author>
<author pid="97/6342">Pierre Canet</author>
<author orcid="0000-0002-2332-4273" pid="89/10395">Mathieu Moreau</author>
<author pid="125/3199">Vincenzo Della Marca</author>
<author pid="15/9430">Adnan Harb</author>
<title>True random number generation exploiting SET voltage variability in resistive RAM memory arrays.</title>
<pages>1-5</pages>
<year>2019</year>
<booktitle>NVMTS</booktitle>
<ee>https://doi.org/10.1109/NVMTS47818.2019.9043369</ee>
<crossref>conf/nvmts/2019</crossref>
<url>db/conf/nvmts/nvmts2019.html#Postel-Pellerin19</url>
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<r><article key="journals/mr/MarcaPKRCB18" mdate="2025-01-19">
<author pid="125/3199">Vincenzo Della Marca</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="349/5324">Thibault Kempf</author>
<author pid="125/3201">Arnaud R&#233;gnier</author>
<author pid="119/8203">Philippe Chiquet</author>
<author pid="00/10856">Marc Bocquet</author>
<title>Quantitative correlation between Flash and equivalent transistor for endurance electrical parameters extraction.</title>
<pages>159-163</pages>
<year>2018</year>
<volume>88-90</volume>
<journal>Microelectron. Reliab.</journal>
<ee>https://doi.org/10.1016/j.microrel.2018.06.116</ee>
<ee>https://www.wikidata.org/entity/Q129145062</ee>
<url>db/journals/mr/mr88.html#MarcaPKRCB18</url>
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<r><inproceedings key="conf/dcis/Kharbouche-Harrari18" mdate="2024-10-06">
<author pid="227/4672">Mounia Kharbouche-Harrari</author>
<author pid="235/3442">Rana Alhalabi</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="61/11031">Romain Wacquez</author>
<author pid="124/8509">Driss Aboulkassimi</author>
<author orcid="0009-0006-5217-8005" pid="200/0294">Etienne Nowak</author>
<author orcid="0000-0001-6577-032X" pid="205/0240">Ioan Lucian Prejbeanu</author>
<author pid="27/6348">Guillaume Prenat</author>
<author pid="61/3518">Gregory di Pendina</author>
<title>MRAM: from STT to SOT, for security and memory.</title>
<pages>1-6</pages>
<year>2018</year>
<booktitle>DCIS</booktitle>
<ee>https://doi.org/10.1109/DCIS.2018.8681468</ee>
<crossref>conf/dcis/2018</crossref>
<url>db/conf/dcis/dcis2018.html#Kharbouche-Harrari18</url>
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<r><inproceedings key="conf/iolts/Kharbouche-Harrari18" mdate="2021-12-24">
<author pid="227/4672">Mounia Kharbouche-Harrari</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="61/3518">Gregory di Pendina</author>
<author pid="61/11031">Romain Wacquez</author>
<author pid="124/8509">Driss Aboulkassimi</author>
<author pid="00/10856">Marc Bocquet</author>
<author pid="227/4641">R. Sousa</author>
<author pid="227/5052">R. Delattre</author>
<author pid="08/4890">Jean-Michel Portal</author>
<title>Impact of a Laser Pulse on a STT-MRAM Bitcell: Security and Reliability Issues.</title>
<pages>243-244</pages>
<year>2018</year>
<booktitle>IOLTS</booktitle>
<ee>https://doi.org/10.1109/IOLTS.2018.8474088</ee>
<crossref>conf/iolts/2018</crossref>
<url>db/conf/iolts/iolts2018.html#Kharbouche-Harrari18</url>
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<r><article key="journals/mr/CanetPA16" mdate="2020-02-22">
<author pid="97/6342">Pierre Canet</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="69/2315">Hassen Aziza</author>
<title>Impact of resistive paths on NVM array reliability: Application to Flash &#38; ReRAM memories.</title>
<pages>36-41</pages>
<year>2016</year>
<volume>64</volume>
<journal>Microelectron. Reliab.</journal>
<ee>https://doi.org/10.1016/j.microrel.2016.07.096</ee>
<url>db/journals/mr/mr64.html#CanetPA16</url>
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<r><article key="journals/mr/MarcaPJCO14" mdate="2020-02-22">
<author pid="125/3199">Vincenzo Della Marca</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="125/3180">Guillaume Just</author>
<author pid="97/6342">Pierre Canet</author>
<author pid="33/8460">Jean-Luc Ogier</author>
<title>Impact of endurance degradation on the programming efficiency and the energy consumption of NOR flash memories.</title>
<pages>2262-2265</pages>
<year>2014</year>
<volume>54</volume>
<journal>Microelectron. Reliab.</journal>
<number>9-10</number>
<ee>https://doi.org/10.1016/j.microrel.2014.07.063</ee>
<url>db/journals/mr/mr54.html#MarcaPJCO14</url>
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<r><article key="journals/mr/CanetPO13" mdate="2020-02-22">
<author pid="97/6342">Pierre Canet</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="33/8460">Jean-Luc Ogier</author>
<title>Access resistor modelling for EEPROM's retention test vehicle.</title>
<pages>1218-1223</pages>
<year>2013</year>
<volume>53</volume>
<journal>Microelectron. Reliab.</journal>
<number>9-11</number>
<ee>https://doi.org/10.1016/j.microrel.2013.07.008</ee>
<url>db/journals/mr/mr53.html#CanetPO13</url>
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<r><article key="journals/jolpe/JustMROPPM12" mdate="2026-05-07">
<author pid="125/3180">Guillaume Just</author>
<author pid="125/3199">Vincenzo Della Marca</author>
<author pid="125/3201">Arnaud R&#233;gnier</author>
<author pid="33/8460">Jean-Luc Ogier</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="08/4890">Jean-Michel Portal</author>
<author orcid="0009-0001-6048-0785" pid="43/6774">Pascal Masson</author>
<title>Effects of Lightly Doped Drain and Channel Doping Variations on Flash Memory Performances and Reliability.</title>
<pages>717-724</pages>
<year>2012</year>
<volume>8</volume>
<journal>J. Low Power Electron.</journal>
<number>5</number>
<ee>https://doi.org/10.1166/jolpe.2012.1230</ee>
<url>db/journals/jolpe/jolpe8.html#JustMROPPM12</url>
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<r><article key="journals/mr/ChiquetMLMPLBO12" mdate="2026-05-07">
<author pid="119/8203">Philippe Chiquet</author>
<author orcid="0009-0001-6048-0785" pid="43/6774">Pascal Masson</author>
<author pid="02/4552">Romain Laffont</author>
<author pid="58/11319">Gilles Micolau</author>
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="21/8457">Fr&#233;d&#233;ric Lalande</author>
<author pid="47/8562">Bernard Bouteille</author>
<author pid="33/8460">Jean-Luc Ogier</author>
<title>Investigation of the effects of constant voltage stress on thin SiO<sub>2</sub> layers using dynamic measurement protocols.</title>
<pages>1895-1900</pages>
<year>2012</year>
<volume>52</volume>
<journal>Microelectron. Reliab.</journal>
<number>9-10</number>
<ee>https://doi.org/10.1016/j.microrel.2012.06.124</ee>
<url>db/journals/mr/mr52.html#ChiquetMLMPLBO12</url>
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<r><article key="journals/mr/Postel-PellerinLMLRB10" mdate="2020-02-22">
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="02/4552">Romain Laffont</author>
<author pid="58/11319">Gilles Micolau</author>
<author pid="21/8457">Fr&#233;d&#233;ric Lalande</author>
<author pid="125/3201">Arnaud R&#233;gnier</author>
<author pid="47/8562">Bernard Bouteille</author>
<title>Leakage paths identification in NVM using biased data retention.</title>
<pages>1474-1478</pages>
<year>2010</year>
<volume>50</volume>
<journal>Microelectron. Reliab.</journal>
<number>9-11</number>
<ee>https://doi.org/10.1016/j.microrel.2010.07.074</ee>
<url>db/journals/mr/mr50.html#Postel-PellerinLMLRB10</url>
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<r><article key="journals/mr/Postel-PellerinLCBJBV09" mdate="2020-02-22">
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="21/8457">Fr&#233;d&#233;ric Lalande</author>
<author pid="97/6342">Pierre Canet</author>
<author pid="76/746">Rachid Bouchakour</author>
<author pid="26/8552">F. Jeuland</author>
<author pid="54/8551">B. Bertello</author>
<author pid="92/8553">B. Villard</author>
<title>Extraction of 3D parasitic capacitances in 90 nm and 22 nm NAND flash memories.</title>
<pages>1056-1059</pages>
<year>2009</year>
<volume>49</volume>
<journal>Microelectron. Reliab.</journal>
<number>9-11</number>
<ee>https://doi.org/10.1016/j.microrel.2009.06.020</ee>
<url>db/journals/mr/mr49.html#Postel-PellerinLCBJBV09</url>
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<r><article key="journals/mr/Postel-PellerinLCBJM09" mdate="2020-02-22">
<author pid="97/8552">J&#233;r&#233;my Postel-Pellerin</author>
<author pid="21/8457">Fr&#233;d&#233;ric Lalande</author>
<author pid="97/6342">Pierre Canet</author>
<author pid="76/746">Rachid Bouchakour</author>
<author pid="26/8552">F. Jeuland</author>
<author pid="76/8554">L. Morancho</author>
<title>Modeling charge variation during data retention of MLC Flash memories.</title>
<pages>1060-1063</pages>
<year>2009</year>
<volume>49</volume>
<journal>Microelectron. Reliab.</journal>
<number>9-11</number>
<ee>https://doi.org/10.1016/j.microrel.2009.06.034</ee>
<url>db/journals/mr/mr49.html#Postel-PellerinLCBJM09</url>
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<co c="0"><na f="a/Aziza:Hassen" pid="69/2315">Hassen Aziza</na></co>
<co c="0"><na f="b/Bazzi:Hussein" pid="261/0364">Hussein Bazzi</na></co>
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<co c="0"><na f="d/Delattre:R=" pid="227/5052">R. Delattre</na></co>
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<co c="0"><na f="m/Melul:Franck" pid="299/5432">Franck Melul</na></co>
<co c="0"><na f="m/Micolau:Gilles" pid="58/11319">Gilles Micolau</na></co>
<co c="0"><na f="m/Morancho:L=" pid="76/8554">L. Morancho</na></co>
<co c="0"><na f="m/Moreau:Mathieu" pid="89/10395">Mathieu Moreau</na></co>
<co c="0"><na f="n/Niel:Stephan" pid="165/6693">Stephan Niel</na></co>
<co c="0"><na f="n/Nowak:Etienne" pid="200/0294">Etienne Nowak</na></co>
<co c="0"><na f="o/Ogier:Jean=Luc" pid="33/8460">Jean-Luc Ogier</na></co>
<co c="0"><na f="p/Pendina:Gregory_di" pid="61/3518">Gregory di Pendina</na></co>
<co c="0"><na f="p/Portal:Jean=Michel" pid="08/4890">Jean-Michel Portal</na></co>
<co c="0"><na f="p/Prejbeanu:Ioan_Lucian" pid="205/0240">Ioan Lucian Prejbeanu</na></co>
<co c="0"><na f="p/Prenat:Guillaume" pid="27/6348">Guillaume Prenat</na></co>
<co c="0"><na f="r/Rahajandraibe:Wenceslas" pid="81/10534">Wenceslas Rahajandraibe</na></co>
<co c="0"><na f="r/R=eacute=gnier:Arnaud" pid="125/3201">Arnaud R&#233;gnier</na></co>
<co c="0"><na f="s/Simola:Roberto" pid="299/4790">Roberto Simola</na></co>
<co c="0"><na f="s/Sousa:R=" pid="227/4641">R. Sousa</na></co>
<co c="0"><na f="t/Taouil:Mottaqiallah" pid="73/9056">Mottaqiallah Taouil</na></co>
<co c="0"><na f="v/Villard:B=" pid="92/8553">B. Villard</na></co>
<co c="0"><na f="w/Wacquez:Romain" pid="61/11031">Romain Wacquez</na></co>
<co c="0"><na f="x/Xun:Hanzhi" pid="348/7602">Hanzhi Xun</na></co>
</coauthors>
</dblpperson>

