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Kazuya Masu Noboru Ishihara Noriaki Nakayama Takashi Sato 0001 Shuhei Amakawa Physical design challenges to nano-CMOS circuits. 703-720 2009 6 IEICE Electron. Express 11 https://doi.org/10.1587/elex.6.703 db/journals/ieiceee/ieiceee6.html#MasuINSA09

Takashi Sato 0001 Hiroyuki Ueyama Noriaki Nakayama Kazuya Masu Accurate Array-Based Measurement for Subthreshold-Current of MOS Transistors. 2977-2986 2009 44 IEEE J. Solid State Circuits 11 https://doi.org/10.1109/JSSC.2009.2028944 db/journals/jssc/jssc44.html#SatoUNM09

Masanori Imai Takashi Sato 0001 Noriaki Nakayama Kazuya Masu An Evaluation Method of the Number of Monte Carlo STA Trials for Statistical Path Delay Analysis. 957-964 2008 91-A IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 4 https://doi.org/10.1093/ietfec/e91-a.4.957 db/journals/ieicet/ieicet91a.html#ImaiSNM08

Kenta Yamada Takashi Sato 0001 Shuhei Amakawa Noriaki Nakayama Kazuya Masu Shigetaka Kumashiro Layout-Aware Compact Model of MOSFET Characteristics Variations Induced by STI Stress. 1142-1150 2008 91-C IEICE Trans. Electron. 7 https://doi.org/10.1093/ietele/e91-c.7.1142 db/journals/ieicet/ieicet91c.html#YamadaSANMK08

Takashi Sato 0001 Hiroyuki Ueyama Noriaki Nakayama Kazuya Masu Determination of optimal polynomial regression function to decompose on-die systematic and random variations. 518-523 2008 ASP-DAC https://doi.org/10.1109/ASPDAC.2008.4484006 http://dl.acm.org/citation.cfm?id=1356929 conf/aspdac/2008 db/conf/aspdac/aspdac2008.html#SatoUNM08 Masanori Imai Takashi Sato 0001 Noriaki Nakayama Kazuya Masu Non-parametric statistical static timing analysis: an SSTA framework for arbitrary distribution. 698-701 2008 DAC https://doi.org/10.1145/1391469.1391649 conf/dac/2008 db/conf/dac/dac2008.html#ImaiSNM08 Takashi Sato 0001 Takumi Uezono Shiho Hagiwara Kenichi Okada 0001 Shuhei Amakawa Noriaki Nakayama Kazuya Masu A MOS Transistor-Array for Accurate Measurement of Subthreshold Leakage Variation. 21-26 2007 conf/isqed/2007 ISQED https://doi.org/10.1109/ISQED.2007.17 https://doi.ieeecomputersociety.org/10.1109/ISQED.2007.17 db/conf/isqed/isqed2007.html#SatoUHOANM07

Shizunori Matsumoto Hiroaki Ueno Satoshi Hosokawa Toshihiko Kitamura Mitiko Miura-Mattausch Hans Jürgen Mattausch Tatsuya Ohguro Shigetaka Kumashiro Tetsuya Yamaguchi Kyoji Yamashita Noriaki Nakayama 1/<i>f</i>-Noise Characteristics in 100 nm-MOSFETs and Its Modeling for Circuit Simulation. 247-254 2005 88-C IEICE Trans. Electron. 2 https://doi.org/10.1093/ietele/E88-C.2.247 db/journals/ieicet/ieicet88c.html#MatsumotoUHKMMOKYYN05

Dondee Navarro Takeshi Mizoguchi Masami Suetake Kazuya Hisamitsu Hiroaki Ueno Mitiko Miura-Mattausch Hans Jürgen Mattausch Shigetaka Kumashiro Tetsuya Yamaguchi Kyoji Yamashita Noriaki Nakayama A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential. 1079-1086 2005 88-C IEICE Trans. Electron. 5 https://doi.org/10.1093/ietele/e88-c.5.1079 db/journals/ieicet/ieicet88c.html#NavarroMSHUMMKYYN05

Kazuya Hisamitsu Hiroaki Ueno Masayasu Tanaka Daisuke Kitamaru Mitiko Miura-Mattausch Hans Jürgen Mattausch Shigetaka Kumashiro Tetsuya Yamaguchi Kyoji Yamashita Noriaki Nakayama Temperature-independence-point properties for 0.1μm-scale pocket-implant technologies and the impact on circuit design. 179-183 2003 ASP-DAC https://doi.org/10.1145/1119772.1119807 conf/aspdac/2003 db/conf/aspdac/aspdac2003.html#HisamitsuUTKMMKYYN03

Mitiko Miura-Mattausch Hiroaki Ueno Hans Jürgen Mattausch Shigetaka Kumashiro Tetsuya Yamaguchi Kyoji Yamashita Noriaki Nakayama Circuit Simulation Models for Coming MOSFET Generations. 740-748 2002 85-A IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 4 http://search.ieice.org/bin/summary.php?id=e85-a_4_740 db/journals/ieiceta/ieiceta85.html#Miura-Mattausch02

Nobuyuki Sano Kazuya Matsuzawa Mikio Mukai Noriaki Nakayama On discrete random dopant modeling in drift-diffusion simulations: physical meaning of 'atomistic' dopants. 189-199 2002 42 Microelectron. Reliab. 2 https://doi.org/10.1016/S0026-2714(01)00138-X db/journals/mr/mr42.html#SanoMMN02

D. Miyawaki Shizunori Matsumoto Hans Jürgen Mattausch S. Ooshiro Masami Suetake Mitiko Miura-Mattausch Shigetaka Kumashiro Tetsuya Yamaguchi Kyoji Yamashita Noriaki Nakayama Correlation method of circuit-performance and technology fluctuations for improved design reliability. 39-44 2001 conf/aspdac/2001 ASP-DAC https://doi.org/10.1145/370155.370260 db/conf/aspdac/aspdac2001.html#MiyawakiMMOSMKYYN01 Shizunori Matsumoto Hans Jürgen Mattausch S. Ooshiro Y. Tatsumi Mitiko Miura-Mattausch Shigetaka Kumashiro Terufumi Yamaguchi Kyoji Yamashita Noriaki Nakayama Test-circuit-based extraction of inter- and intra-chip MOSFET-performance variations for analog-design reliability. 357-360 2001 CICC https://doi.org/10.1109/CICC.2001.929801 conf/cicc/2001 db/conf/cicc/cicc2001.html#MatsumotoMOTMKY01

Shoji Tanaka Noriaki Nakayama Numerical simulation of neuronal population coding: influences of noise and tuning width on the coding error. 447-456 1995 73 Biol. Cybern. 5 https://doi.org/10.1007/BF00201479 db/journals/bc/bc73.html#TanakaN95

Shuhei Amakawa Shiho Hagiwara Kazuya Hisamitsu Satoshi Hosokawa Masanori Imai Noboru Ishihara Daisuke Kitamaru Toshihiko Kitamura Shigetaka Kumashiro Kazuya Masu Shizunori Matsumoto Kazuya Matsuzawa Hans Jürgen Mattausch Mitiko Miura-Mattausch D. Miyawaki Takeshi Mizoguchi Mikio Mukai Dondee Navarro Tatsuya Ohguro Kenichi Okada 0001 S. Ooshiro Nobuyuki Sano Takashi Sato 0001 Masami Suetake Masayasu Tanaka Shoji Tanaka Y. Tatsumi Hiroaki Ueno Hiroyuki Ueyama Takumi Uezono Kenta Yamada Terufumi Yamaguchi Tetsuya Yamaguchi Kyoji Yamashita