Consideration of Network Anomaly Detection Models using Machine Learning.

Chikatoshi Yamada Soma Kai Chikatoshi Yamada Consideration of Network Anomaly Detection Models using Machine Learning. 368-370 2025 CANDARW https://doi.org/10.1109/CANDARW68385.2025.00071 conf/candar/2025w db/conf/candar/candar2025w.html#KaiY25 streams/conf/candar Seiya Ogido Chikatoshi Yamada Kei Miyagi Shuichi Ichikawa A Study of a Fault-Tolerant System Using Dynamic Partial Reconfiguration. 600-602 2017 CANDAR https://doi.org/10.1109/CANDAR.2017.57 https://doi.ieeecomputersociety.org/10.1109/CANDAR.2017.57 conf/ic-nc/2017 db/conf/ic-nc/candar2017.html#OgidoYMI17

Chikatoshi Yamada D. Michael Miller Using SPIN to Check Simulink Stateflow Models. 65-74 2016 4 Int. J. Networked Distributed Comput. 1 https://doi.org/10.2991/ijndc.2016.4.1.7 db/journals/ijndc/ijndc4.html#YamadaM16

Chikatoshi Yamada D. Michael Miller Using SPIN to Check Simulink Stateflow Models. 193-202 2016 4 Int. J. Networked Distributed Comput. 3 https://doi.org/10.2991/ijndc.2016.4.3.6 db/journals/ijndc/ijndc4.html#YamadaM16a

Chikatoshi Yamada D. Michael Miller Using SPIN to check Simulink Stateflow models. 161-166 2015 ICIS https://doi.org/10.1109/ICIS.2015.7166587 https://doi.ieeecomputersociety.org/10.1109/ICIS.2015.7166587 conf/ACISicis/2015 db/conf/ACISicis/ACISicis2015.html#YamadaM15 Chikatoshi Yamada D. Michael Miller Using SPIN to Check Nondeterministic Simulink Stateflow Models. 145-151 2015 ISMVL https://doi.org/10.1109/ISMVL.2015.17 https://doi.ieeecomputersociety.org/10.1109/ISMVL.2015.17 conf/ismvl/2015 db/conf/ismvl/ismvl2015.html#YamadaM15 Satoru Tamura Chikatoshi Yamada Shuichi Ichikawa Implementation and Evaluation of Modular Multiplication Based on Coarsely Integrated Operand Scanning. 334-335 2012 conf/ic-nc/2012 ICNC https://doi.org/10.1109/ICNC.2012.65 https://doi.ieeecomputersociety.org/10.1109/ICNC.2012.65 db/conf/ic-nc/ic-nc2012.html#TamuraYI12 Kazuhide Sugimoto Kentaro Noguchi Chikatoshi Yamada Takahiro Yonamine Work in progress - Development and practice of national colleges of technology version embedded technology skill standards. 4 2011 FIE https://doi.org/10.1109/FIE.2011.6142831 https://doi.ieeecomputersociety.org/10.1109/FIE.2011.6142831 conf/fie/2011 db/conf/fie/fie2011.html#SugimotoNYY11

Seiki Akama Yasunori Nagata Chikatoshi Yamada Three-Valued Temporal Logic Q t and Future Contingents. 215-231 2008 88 Stud Logica 2 https://doi.org/10.1007/s11225-008-9102-0 db/journals/sLogica/sLogica88.html#AkamaNY08

Chikatoshi Yamada Yasunori Nagata Zensho Nakao An Efficient Specification for System Verification. 931-938 2006 10 J. Adv. Comput. Intell. Intell. Informatics 6 https://doi.org/10.20965/jaciii.2006.p0931 db/journals/jaciii/jaciii10.html#YamadaNN06

Chikatoshi Yamada Yasunori Nagata Zensho Nakao Inductive Temporal Formula Specifications for System Verification. 321-328 2005 9 J. Adv. Comput. Intell. Intell. Informatics 3 https://doi.org/10.20965/jaciii.2005.p0321 db/journals/jaciii/jaciii9.html#YamadaNN05

Seiki Akama Shuichi Ichikawa Soma Kai D. Michael Miller Kei Miyagi Yasunori Nagata Zensho Nakao Kentaro Noguchi Seiya Ogido Kazuhide Sugimoto Satoru Tamura Takahiro Yonamine