Multi-Partner Project: Reverse Engineering Methods for Trusted Chip Design (RESEC).

Horst A. Gieser Bernhard Lippmann Johanna Baehr 0001 Alexander Hepp Horst A. Gieser Multi-Partner Project: Reverse Engineering Methods for Trusted Chip Design (RESEC). 1-7 2025 DATE https://doi.org/10.23919/DATE64628.2025.10992775 conf/date/2025 db/conf/date/date2025.html#Lippmann0HG25 Vartika Verma Eslam Ahmed Nicola Kovac Christof Landesberger Horst A. Gieser Ralf Brederlow Analysis of Piezoresistive Silicon as Sense Element for use in Flexible Tactile Sensors. 1-4 2024 IEEE SENSORS https://doi.org/10.1109/SENSORS60989.2024.10785001 conf/ieeesensors/2024 db/conf/ieeesensors/ieeesensors2024.html#VermaAKLGB24 Bernhard Lippmann Ann-Christin Bette Matthias Ludwig 0005 Johannes Mutter Johanna Baehr 0001 Alexander Hepp Horst A. Gieser Nicola Kovac Tobias Zweifel Martin Rasche Oliver Kellermann Physical and Functional Reverse Engineering Challenges for Advanced Semiconductor Solutions. 796-801 2022 DATE https://doi.org/10.23919/DATE54114.2022.9774610 conf/date/2022 db/conf/date/date2022.html#LippmannBLMBHGK22

Bernhard Lippmann Niklas Unverricht Aayush Singla Matthias Ludwig 0005 Michael Werner Peter Egger Anja Dübotzky Helmut Gräb Horst A. Gieser Martin Rasche Oliver Kellermann Verification of physical designs using an integrated reverse engineering flow for nanoscale technologies. 11-29 2020 71 Integr. https://doi.org/10.1016/j.vlsi.2019.11.005 https://www.wikidata.org/entity/Q126777462 db/journals/integration/integration71.html#LippmannUSLWEDG20

Johann Heyszl Katja Miller Florian Unterstein Marc Schink Alexander Wagner Horst A. Gieser Sven Freud Tobias Damm Dominik Klein 0001 Dennis Kügler Investigating Profiled Side-Channel Attacks Against the DES Key Schedule. 22-72 2020 2020 IACR Trans. Cryptogr. Hardw. Embed. Syst. 3 https://doi.org/10.13154/tches.v2020.i3.22-72 db/journals/tches/tches2020.html#HeyszlMUSWGFDKK20

Bernhard Lippmann Michael Werner Niklas Unverricht Aayush Singla Peter Egger Anja Dübotzky Horst A. Gieser Martin Rasche Oliver Kellermann Helmut Graeb Integrated flow for reverse engineering of nanoscale technologies. 82-89 2019 ASP-DAC https://doi.org/10.1145/3287624.3288738 conf/aspdac/2019 db/conf/aspdac/aspdac2019.html#LippmannWUSEDGR19

Johann Heyszl Katja Miller Florian Unterstein Marc Schink Alexander Wagner Horst A. Gieser Sven Freud Tobias Damm Dominik Klein 0001 Dennis Kügler Investigating Profiled Side-Channel Attacks Against the DES Key Schedule. 1448 2019 2019 IACR Cryptol. ePrint Arch. https://eprint.iacr.org/2019/1448 db/journals/iacr/iacr2019.html#HeyszlMUSWGFD0K19

Tekfouy Lim Horst A. Gieser Luca Santarelli Franco Cacialli Electrostatic discharge sensitivity investigation on organic field-effect thin film transistors. 1-4 2015 NEWCAS https://doi.org/10.1109/NEWCAS.2015.7182117 conf/newcas/2015 db/conf/newcas/newcas2015.html#LimGSC15

Heinrich Wolf Horst A. Gieser Dirk Walter Investigating the CDM susceptibility of IC's at package and wafer level by capacitive coupled TLP. 1476-1481 2009 49 Microelectron. Reliab. 12 https://doi.org/10.1016/j.microrel.2009.10.006 db/journals/mr/mr49.html#WolfGW09

M. Etherton Ning Qu J. Willemen Wolfgang Wilkening S. Mettler Mariano Dissegna R. Stella L. Zullino A. Andreini Horst A. Gieser Study of CDM specific effects for a smart power input protection structure. 666-676 2006 46 Microelectron. Reliab. 5-6 https://doi.org/10.1016/j.microrel.2005.10.008 db/journals/mr/mr46.html#EthertonQWWMDSZAG06

Heinrich Wolf Horst A. Gieser Detlef Bonfert Markus Hauser ESD Susceptibility of Submicron Air Gaps. 1587-1590 2006 46 Microelectron. Reliab. 9-11 https://doi.org/10.1016/j.microrel.2006.07.039 db/journals/mr/mr46.html#WolfGBH06

Detlef Bonfert Horst A. Gieser Heinrich Wolf M. Frank A. Konrad J. Schulz Transient-induced latch-up test setup for wafer-level and package-level. 1629-1633 2006 46 Microelectron. Reliab. 9-11 https://doi.org/10.1016/j.microrel.2006.08.002 db/journals/mr/mr46.html#BonfertGWFKS06

Heinrich Wolf Horst A. Gieser Wolfgang Stadler Wolfgang Wilkening Capacitively coupled transmission line pulsing cc-TLP--a traceable and reproducible stress method in the CDM-domain. 279-285 2005 45 Microelectron. Reliab. 2 https://doi.org/10.1016/j.microrel.2004.05.015 db/journals/mr/mr45.html#WolfGSW05

S. Bargstädt-Franke Wolfgang Stadler Kai Esmark Martin Streibl Krzysztof Domanski Horst A. Gieser Heinrich Wolf Waclaw Bala Transient latch-up: experimental analysis and device simulation. 297-304 2005 45 Microelectron. Reliab. 2 https://doi.org/10.1016/j.microrel.2004.05.017 db/journals/mr/mr45.html#Bargstadt-FrankeSESDGWB05

Heinrich Wolf Horst A. Gieser Wolfgang Soldner Harald Gossner A Dedicated TLP Set-Up to Investigate the ESD Robustness of RF Elements and Circuits. 1421-1424 2005 45 Microelectron. Reliab. 9-11 https://doi.org/10.1016/j.microrel.2005.07.032 db/journals/mr/mr45.html#WolfGSG05

Horst A. Gieser On-chip electrostatic discharge ESD. 985-986 2003 43 Microelectron. Reliab. 7 https://doi.org/10.1016/S0026-2714(03)00122-7 db/journals/mr/mr43.html#Gieser03

Eslam Ahmed A. Andreini Johanna Baehr 0001 Waclaw Bala S. Bargstädt-Franke Ann-Christin Bette Detlef Bonfert Ralf Brederlow Franco Cacialli Tobias Damm Mariano Dissegna Krzysztof Domanski Anja Dübotzky Peter Egger Kai Esmark M. Etherton M. Frank Sven Freud Harald Gossner Helmut E. GraebHelmut GraebHelmut Gräb Markus Hauser Alexander Hepp Johann Heyszl Oliver Kellermann Dominik Klein 0001 A. Konrad Nicola Kovac Dennis Kügler Christof Landesberger Tekfouy Lim Bernhard Lippmann Matthias Ludwig 0005 S. Mettler Katja Miller Johannes Mutter Ning Qu Martin Rasche Luca Santarelli Marc Schink J. Schulz Aayush Singla Wolfgang Soldner Wolfgang Stadler R. Stella Martin Streibl Florian Unterstein Niklas Unverricht Vartika Verma Alexander Wagner Dirk Walter Michael Werner Wolfgang Wilkening J. Willemen Heinrich Wolf L. Zullino Tobias Zweifel