TMorph: A Traffic Morphing Framework to Test Network Defenses Against Adversarial Attacks.

Radu Muresan Zhenning Xu Hassan Khan Radu Muresan TMorph: A Traffic Morphing Framework to Test Network Defenses Against Adversarial Attacks. 18-23 2022 ICOIN https://doi.org/10.1109/ICOIN53446.2022.9687165 conf/icoin/2022 db/conf/icoin/icoin2022.html#XuKM22 Shanhong Liu Radu Muresan Arafat Al-Dweik Leveraging Deep Learning for Inattentive Driving Behavior with In-Vehicle Cameras. 1-6 2020 ISNCC https://doi.org/10.1109/ISNCC49221.2020.9297247 conf/isncc/2020 db/conf/isncc/isncc2020.html#LiuMA20

Kamal Youcef-Toumi Radu Muresan Mixed-Signal Physically Unclonable Function With CMOS Capacitive Cells. 130977-130998 2019 7 IEEE Access https://doi.org/10.1109/ACCESS.2019.2938729 db/journals/access/access7.html#Youcef-ToumiM19

Graham Thoms Radu Muresan Arafat Al-Dweik Chaotic Encryption Algorithm With Key Controlled Neural Networks for Intelligent Transportation Systems. 158697-158709 2019 7 IEEE Access https://doi.org/10.1109/ACCESS.2019.2950007 https://www.wikidata.org/entity/Q122156802 db/journals/access/access7.html#ThomsMA19

Viktor Lidkea Radu Muresan Arafat Al-Dweik Shu Zhou Improving the Security of Cloud-Based Intelligent Transportation Systems. 1-4 2019 CCECE https://doi.org/10.1109/CCECE.2019.8861723 conf/ccece/2019 db/conf/ccece/ccece2019.html#LidkeaMAZ19 Graham Thoms Radu Muresan Arafat Al-Dweik Design of Chaotic Block Cipher Operation Mode for Intelligent Transportation Systems. 1-4 2019 ICCE https://doi.org/10.1109/ICCE.2019.8661961 conf/iccel/2019 db/conf/iccel/icce2019.html#ThomsMA19

Li Yang 0010 Radu Muresan Arafat Al-Dweik Leontios J. Hadjileontiadis Image-Based Visibility Estimation Algorithm for Intelligent Transportation Systems. 76728-76740 2018 6 IEEE Access https://doi.org/10.1109/ACCESS.2018.2884225 db/journals/access/access6.html#YangMAH18

Matthew Mayhew Radu Muresan An overview of hardware-level statistical power analysis attack countermeasures. 213-244 2017 7 J. Cryptogr. Eng. 3 https://doi.org/10.1007/s13389-016-0133-6 db/journals/jce/jce7.html#MayhewM17

Arafat Al-Dweik Matthew Mayhew Radu Muresan Shirook M. Ali Abdallah Shami Using Technology to Make Roads Safer: Adaptive Speed Limits for an Intelligent Transportation System. 39-47 2017 12 IEEE Veh. Technol. Mag. 1 https://doi.org/10.1109/MVT.2016.2634462 db/journals/vtm/vtm12.html#Al-DweikMMAS17

Arafat Al-Dweik Radu Muresan Matthew Mayhew Mark Lieberman IoT-based multifunctional Scalable real-time Enhanced Road Side Unit for Intelligent Transportation Systems. 1-6 2017 CCECE https://doi.org/10.1109/CCECE.2017.7946618 conf/ccece/2017 db/conf/ccece/ccece2017.html#Al-DweikMML17 Kamal Youcef-Toumi Radu Muresan Capacitive physically unclonable function. 1-6 2017 CCECE https://doi.org/10.1109/CCECE.2017.7946730 conf/ccece/2017 db/conf/ccece/ccece2017.html#KamalM17

Matthew Mayhew Radu Muresan Implementation of a decoupling based power analysis attack countermeasure. 528-535 2016 10 IET Circuits Devices Syst. 6 https://doi.org/10.1049/iet-cds.2016.0010 db/journals/iet-cds/iet-cds10.html#MayhewM16

Matthew Mayhew Radu Muresan On-Chip Nanoscale Capacitor Decoupling Architectures for Hardware Security. 4-15 2014 2 IEEE Trans. Emerg. Top. Comput. 1 https://doi.org/10.1109/TETC.2014.2303934 http://doi.ieeecomputersociety.org/10.1109/TETC.2014.2303934 https://www.wikidata.org/entity/Q114984829 db/journals/tetc/tetc2.html#MayhewM14

Matthew Mayhew Radu Muresan Modeling the effect of NMOS gate capacitance in an on-chip decoupling capacitor PAA countermeasure. 121-124 2014 MWSCAS https://doi.org/10.1109/MWSCAS.2014.6908367 conf/mwscas/2014 db/conf/mwscas/mwscas2014.html#MayhewM14

Mark Lieberman Radu Muresan Simon X. Yang David Doyle Hilbert-Huang Transform for Feature Extraction of temperature modulated MOS sensors. 2013 9 Int. J. Inf. Acquis. 3-4 https://doi.org/10.1142/S0219878913500149 db/journals/ijia/ijia9.html#LiebermanMYD13

Radu Muresan Matthew Mayhew On-chip decoupling architecture with variable nMOS gate capacitance for security protection. 1342-1345 2013 MWSCAS https://doi.org/10.1109/MWSCAS.2013.6674904 conf/mwscas/2013 db/conf/mwscas/mwscas2013.html#MuresanM13 Matthew Mayhew Radu Muresan Integrated capacitor switchbox for security protection. 1452-1455 2012 ISCAS https://doi.org/10.1109/ISCAS.2012.6271520 conf/iscas/2012 db/conf/iscas/iscas2012.html#MayhewM12

Haleh Vahedi Stefano Gregori Radu Muresan The effectiveness of a current flattening circuit as countermeasure against DPA attacks. 180-187 2011 42 Microelectron. J. 1 https://doi.org/10.1016/j.mejo.2010.08.011 db/journals/mj/mj42.html#VahediGM11

Haleh Vahedi Stefano Gregori Radu Muresan On-Chip Power-Efficient Current Flattening Circuit. 565-579 2009 18 J. Circuits Syst. Comput. 3 https://doi.org/10.1142/S0218126609005332 db/journals/jcsc/jcsc18.html#VahediGM09

Radu Muresan Stefano Gregori Protection Circuit against Differential Power Analysis Attacks for Smart Cards. 1540-1549 2008 57 IEEE Trans. Computers 11 https://doi.org/10.1109/TC.2008.107 http://doi.ieeecomputersociety.org/10.1109/TC.2008.107 db/journals/tc/tc57.html#MuresanG08

Darshana Patel Radu Muresan Triple-DES ASIC Module for a Power-Smart System-on-Chip Architecture. 1069-1072 2006 conf/ccece/2006 CCECE https://doi.org/10.1109/CCECE.2006.277763 db/conf/ccece/ccece2006.html#PatelM06 Zhanrong Yang Radu Muresan The Impact of the Implementation Style on Power Consumption and Security in Embedded Cryptosystems. 1325-1328 2006 conf/ccece/2006 CCECE https://doi.org/10.1109/CCECE.2006.277573 db/conf/ccece/ccece2006.html#YangM06 Haleh Vahedi Radu Muresan Stefano Gregori On-chip current flattening circuit with dynamic voltage scaling. 2006 conf/iscas/2006 ISCAS https://doi.org/10.1109/ISCAS.2006.1693574 db/conf/iscas/iscas2006.html#VahediMG06

Radu Muresan Catherine H. Gebotys Instantaneous current modeling in a complex VLIW processor core. 415-451 2005 4 ACM Trans. Embed. Comput. Syst. 2 https://doi.org/10.1145/1067915.1067923 db/journals/tecs/tecs4.html#MuresanG05

Radu Muresan Haleh Vahedi Y. Zhanrong Stefano Gregori Power-smart system-on-chip architecture for embedded cryptosystems. 184-189 2005 conf/codes/2005 CODES+ISSS https://doi.org/10.1145/1084834.1084883 db/conf/codes/codes2005.html#MuresanVZG05 Xuequn Li Haleh Vahedi Radu Muresan Stefano Gregori An integrated current flattening module for embedded cryptosystems. 436-439 2005 conf/iscas/2005 ISCAS (1) https://doi.org/10.1109/ISCAS.2005.1464618 db/conf/iscas/iscas2005-1.html#LiVMG05 Radu Muresan Catherine H. Gebotys Current flattening in software and hardware for security applications. 218-223 2004 conf/codes/2004 CODES+ISSS https://doi.org/10.1145/1016720.1016773 https://doi.org/10.1109/CODES+ISSS.2004.16 db/conf/codes/codes2004.html#MuresanG04 Catherine H. Gebotys Radu Muresan Modeling Power Dynamics for an Embedded DSP Processor Core. An Empirical Model. 205-216 2001 conf/ifip10-5/2001 VLSI-SOC db/conf/ifip10-5/ifip10-5-2001.html#GebotysM01 Radu Muresan Catherine H. Gebotys Current consumption dynamics at instruction and program level for a <i>VLIW</i> DSP processor. 130-135 2001 conf/isss/2001 ISSS db/conf/isss/isss2001.html#MuresanG01 https://doi.org/10.1109/ISSS.2001.957927 https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957927 https://doi.org/10.1145/500001.500032 Arafat Al-Dweik Shirook M. Ali David Doyle Catherine H. Gebotys Stefano Gregori Leontios J. Hadjileontiadis Hassan Khan Xuequn Li Viktor Lidkea Mark Lieberman Shanhong Liu Matthew Mayhew Darshana Patel Abdallah Shami Graham Thoms Haleh Vahedi Zhenning Xu Li Yang 0010 Simon X. Yang Zhanrong Yang Kamal Youcef-Toumi Y. Zhanrong Shu Zhou