<?xml version="1.0"?>
<dblpperson name="Ricardo Mata" pid="65/459" n="1">
<person key="homepages/65/459" mdate="2009-06-09">
<author pid="65/459">Ricardo Mata</author>
</person>
<r><article key="journals/ibmrd/BenderSKMPHS08" mdate="2020-03-13">
<author pid="21/4288">Carl A. Bender</author>
<author pid="61/2817">Pia N. Sanda</author>
<author pid="64/571">Prabhakar Kudva</author>
<author pid="65/459">Ricardo Mata</author>
<author pid="56/4199">Vikas Pokala</author>
<author pid="56/3823">Ryan Haraden</author>
<author pid="70/6257">Matthew Schallhorn</author>
<title>Soft-error resilience of the IBM POWER6 processor input/output subsystem.</title>
<pages>285-292</pages>
<year>2008</year>
<volume>52</volume>
<journal>IBM J. Res. Dev.</journal>
<number>3</number>
<ee>https://doi.org/10.1147/rd.523.0285</ee>
<url>db/journals/ibmrd/ibmrd52.html#BenderSKMPHS08</url>
</article>
</r>
<coauthors n="6" nc="1">
<co c="0"><na f="b/Bender:Carl_A=" pid="21/4288">Carl A. Bender</na></co>
<co c="0"><na f="h/Haraden:Ryan" pid="56/3823">Ryan Haraden</na></co>
<co c="0"><na f="k/Kudva:Prabhakar" pid="64/571">Prabhakar Kudva</na></co>
<co c="0"><na f="p/Pokala:Vikas" pid="56/4199">Vikas Pokala</na></co>
<co c="0"><na f="s/Sanda:Pia_N=" pid="61/2817">Pia N. Sanda</na></co>
<co c="0"><na f="s/Schallhorn:Matthew" pid="70/6257">Matthew Schallhorn</na></co>
</coauthors>
</dblpperson>

