<?xml version="1.0"?>
<dblpperson name="Rajamohan Varambally" pid="61/2201" n="1">
<person key="homepages/61/2201" mdate="2009-06-09">
<author pid="61/2201">Rajamohan Varambally</author>
</person>
<r><inproceedings key="conf/vlsid/BhaumikPVVH99" mdate="2023-03-24">
<author pid="63/2537">Basabi Bhaumik</author>
<author pid="47/4340">Pravas Pradhan</author>
<author pid="18/684">G. S. Visweswaran</author>
<author pid="61/2201">Rajamohan Varambally</author>
<author pid="21/5588">Anand Hardi</author>
<title>A Low Power 256 KB SRAM Design.</title>
<pages>67-71</pages>
<year>1999</year>
<crossref>conf/vlsid/1999</crossref>
<booktitle>VLSI Design</booktitle>
<url>db/conf/vlsid/vlsid1999.html#BhaumikPVVH99</url>
<ee>https://doi.org/10.1109/ICVD.1999.745126</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/ICVD.1999.745126</ee>
</inproceedings>
</r>
<coauthors n="4" nc="1">
<co c="0"><na f="b/Bhaumik:Basabi" pid="63/2537">Basabi Bhaumik</na></co>
<co c="0"><na f="h/Hardi:Anand" pid="21/5588">Anand Hardi</na></co>
<co c="0"><na f="p/Pradhan:Pravas" pid="47/4340">Pravas Pradhan</na></co>
<co c="0"><na f="v/Visweswaran:G=_S=" pid="18/684">G. S. Visweswaran</na></co>
</coauthors>
</dblpperson>

