Proceedings of the 2001 International Symposium on Physical Design, ISPD 2001, Sonoma County, CA, USA, April 1-4, 2001

Manfred Wiesel Sachin S. Sapatnekar Manfred Wiesel Proceedings of the 2001 International Symposium on Physical Design, ISPD 2001, Sonoma County, CA, USA, April 1-4, 2001 ISPD ACM 2001 1-58113-347-2 https://doi.org/10.1145/369691 db/conf/ispd/ispd2001.html Manfred Wiesel Dwight D. Hill Proceedings of the 2000 International Symposium on Physical Design, ISPD 2000, San Diego, CA, USA, April 9-12, 2000 ISPD ACM 2000 1-58113-191-7 https://doi.org/10.1145/332357 db/conf/ispd/ispd2000.html Nikil D. Dutt David Agnew Raul Camposano Antun Domic Manfred Wiesel Hiroto Yasuura Design Reuse: Fact or Fiction? (Panel). 562 1994 conf/dac/1994 DAC https://doi.org/10.1145/196244.196555 db/conf/dac/dac94.html#DuttACDWY94 Alfred E. Dunlop Vishwani D. Agrawal David N. Deutsch M. F. Jukl Patrick Kozak Manfred Wiesel Chip layout optimization using critical path weighting. 133-136 1984 DAC http://dl.acm.org/citation.cfm?id=800787 conf/dac/1984 db/conf/dac/dac1984.html#DunlopADJKW84 G. J. Wipfler Manfred Wiesel Dieter A. Mlynski A combined force and cut algorithm for hierarchical VLSI layout. 671-677 1982 DAC https://doi.org/10.1145/800263.809274 conf/dac/1982 db/conf/dac/dac1982.html#WipflerWM82 Manfred Wiesel Dieter A. Mlynski Two-dimensional channel routing and channel intersection problems. 733-739 1982 DAC https://doi.org/10.1145/800263.809283 conf/dac/1982 db/conf/dac/dac1982.html#WieselM82 Manfred Wiesel Rechnergestütztes Layout von Leiterplatten und integrierten Schaltungen. 1981 1-131 VDI-Verlag Karlsruhe Institute of Technology, Germany 978-3-18-143009-5 https://d-nb.info/820179841 David Agnew Vishwani D. Agrawal Raúl CamposanoRaul Camposano David N. Deutsch Antun Domic Alfred E. Dunlop Nikil D. Dutt Dwight D. Hill M. F. Jukl Patrick Kozak Dieter A. Mlynski Sachin S. Sapatnekar G. J. Wipfler Hiroto Yasuura