Multi-Layer Diagnosis for Fault-Tolerant Networks-on-Chip.

Atefe Dalirsani

Gert Schley Atefe Dalirsani Marcus Eggenberger Nadereh Hatami Hans-Joachim Wunderlich Martin Radetzki Multi-Layer Diagnosis for Fault-Tolerant Networks-on-Chip. 848-861 2017 66 IEEE Trans. Computers 5 https://doi.org/10.1109/TC.2016.2628058 http://doi.ieeecomputersociety.org/10.1109/TC.2016.2628058 db/journals/tc/tc66.html#SchleyDEHWR17

Atefe Dalirsani Hans-Joachim Wunderlich Functional Diagnosis for Graceful Degradation of NoC Switches. 246-251 2016 ATS https://doi.org/10.1109/ATS.2016.18 https://doi.ieeecomputersociety.org/10.1109/ATS.2016.18 conf/ats/2016 db/conf/ats/ats2016.html#DalirsaniW16 Atefe Dalirsani Self-diagnosis in Network-on-Chips. 2015 University of Stuttgart http://elib.uni-stuttgart.de/opus/volltexte/2015/10146/ https://nbn-resolving.org/urn:nbn:de:bsz:93-opus-101468 https://d-nb.info/1076503330 Michael A. Kochte Atefe Dalirsani Andrea Bernabei Martin Omaña 0001 Cecilia Metra Hans-Joachim Wunderlich Intermittent and Transient Fault Diagnosis on Sparse Code Signatures. 157-162 2015 ATS https://doi.org/10.1109/ATS.2015.34 https://doi.ieeecomputersociety.org/10.1109/ATS.2015.34 conf/ats/2015 db/conf/ats/ats2015.html#KochteDBOMW15 Atefe Dalirsani Nadereh Hatami Michael E. Imhof Marcus Eggenberger Gert Schley Martin Radetzki Hans-Joachim Wunderlich On Covering Structural Defects in NoCs by Functional Tests. 87-92 2014 ATS https://doi.org/10.1109/ATS.2014.27 https://doi.ieeecomputersociety.org/10.1109/ATS.2014.27 conf/ats/2014 db/conf/ats/ats2014.html#DalirsaniHIESRW14 Atefe Dalirsani Michael A. Kochte Hans-Joachim Wunderlich Area-efficient synthesis of fault-secure NoC switches. 13-18 2014 IOLTS https://doi.org/10.1109/IOLTS.2014.6873662 conf/iolts/2014 db/conf/iolts/iolts2014.html#DalirsaniKW14 Atefe Dalirsani Michael E. Imhof Hans-Joachim Wunderlich Structural Software-Based Self-Test of Network-on-Chip. 1-6 2014 VTS https://doi.org/10.1109/VTS.2014.6818754 https://doi.ieeecomputersociety.org/10.1109/VTS.2014.6818754 conf/vts/2014 db/conf/vts/vts2014.html#DalirsaniIW14 Atefe Dalirsani Michael A. Kochte Hans-Joachim Wunderlich SAT-based code synthesis for fault-secure circuits. 39-44 2013 DFTS https://doi.org/10.1109/DFT.2013.6653580 https://doi.ieeecomputersociety.org/10.1109/DFT.2013.6653580 conf/dft/2013 db/conf/dft/dft2013.html#DalirsaniKW13

Atefe Dalirsani Stefan Holst Melanie Elm Hans-Joachim Wunderlich Structural Test and Diagnosis for Graceful Degradation of NoC Switches. 831-841 2012 28 J. Electron. Test. 6 https://doi.org/10.1007/s10836-012-5329-9 db/journals/et/et28.html#DalirsaniHEW12

Atefe Dalirsani Stefan Holst Melanie Elm Hans-Joachim Wunderlich Structural Test for Graceful Degradation of NoC Switches. 183-188 2011 ETS https://doi.org/10.1109/ETS.2011.33 https://doi.ieeecomputersociety.org/10.1109/ETS.2011.33 conf/ets/2011 db/conf/ets/ets2011.html#DalirsaniHEW11 Mohammad Hosseinabady Atefe Dalirsani Zainalabedin Navabi Using the inter- and intra-switch regularity in NoC switch testing. 361-366 2007 conf/date/2007 DATE https://doi.org/10.1109/DATE.2007.364618 https://doi.ieeecomputersociety.org/10.1109/DATE.2007.364618 http://dl.acm.org/citation.cfm?id=1266443 db/conf/date/date2007.html#HosseinabadyDN07 Atefe Dalirsani Mohammad Hosseinabady Zainalabedin Navabi An Analytical Model for Reliability Evaluation of NoC Architectures. 49-56 2007 conf/iolts/2007 IOLTS https://doi.org/10.1109/IOLTS.2007.13 https://doi.ieeecomputersociety.org/10.1109/IOLTS.2007.13 db/conf/iolts/iolts2007.html#DalirsaniHN07 Andrea Bernabei Marcus Eggenberger Melanie Elm Nadereh Hatami Stefan Holst Mohammad Hosseinabady Michael E. Imhof Michael A. Kochte Cecilia Metra Zainalabedin Navabi Martin Omaña 0001 Martin Radetzki Gert Schley Hans-Joachim Wunderlich