<?xml version="1.0"?>
<dblpperson name="Edgard Cansio" pid="362/0699" n="2">
<person key="homepages/362/0699" mdate="2023-12-01">
<author pid="362/0699">Edgard Cansio</author>
</person>
<r><inproceedings key="conf/fpga/Cansio25" mdate="2025-03-04">
<author orcid="0009-0005-1857-4074" pid="362/0699">Edgard Cansio</author>
<title>FPGA Implementation of a 1D-CNN Modulation Classifier for Radar Signals.</title>
<pages>48</pages>
<year>2025</year>
<booktitle>FPGA</booktitle>
<ee>https://doi.org/10.1145/3706628.3708845</ee>
<crossref>conf/fpga/2025</crossref>
<url>db/conf/fpga/fpga2025.html#Cansio25</url>
</inproceedings>
</r>
<r><inproceedings key="conf/sccc/BarthC23" mdate="2025-03-03">
<author orcid="0000-0001-8957-3929" pid="362/0969">Canisio Barth</author>
<author orcid="0009-0005-1857-4074" pid="362/0699">Edgard Cansio</author>
<title>SoC-Based Multichannel STFT Generator for Digital Electronic Warfare Receivers.</title>
<pages>1-4</pages>
<year>2023</year>
<booktitle>SCCC</booktitle>
<ee>https://doi.org/10.1109/SCCC59417.2023.10315735</ee>
<crossref>conf/sccc/2023</crossref>
<url>db/conf/sccc/sccc2023.html#BarthC23</url>
</inproceedings>
</r>
<coauthors n="1" nc="0">
<co c="-1"><na f="b/Barth:Canisio" pid="362/0969">Canisio Barth</na></co>
</coauthors>
</dblpperson>

