<?xml version="1.0"?>
<dblpperson name="Yoshihiro Ishibashi" pid="182/9784" n="1">
<person key="homepages/182/9784" mdate="2016-07-13">
<author pid="182/9784">Yoshihiro Ishibashi</author>
</person>
<r><article key="journals/tc/GotoMNNMMIISW60" mdate="2020-05-25">
<author pid="58/1803">Eiichi Goto</author>
<author pid="182/9777">Kenro Murata</author>
<author pid="76/2485">Kisaburo Nakazawa</author>
<author pid="151/9379">Keisuke Nakagawa</author>
<author pid="71/6241">Tohru Moto-Oka</author>
<author pid="182/9779">Yasushi Miatsu-Oka</author>
<author pid="182/9784">Yoshihiro Ishibashi</author>
<author pid="82/3862">Haruhisa Ishida</author>
<author pid="79/7684">Takashi Soma</author>
<author pid="02/5279">Eiiti Wada</author>
<title>Esaki Diode High-Speed Logical Circuits.</title>
<pages>25-29</pages>
<year>1960</year>
<volume>9</volume>
<journal>IRE Trans. Electron. Comput.</journal>
<number>1</number>
<ee>https://doi.org/10.1109/TEC.1960.5221600</ee>
<url>db/journals/tc/tc9.html#GotoMNNMMIISW60</url>
</article>
</r>
<coauthors n="9" nc="1">
<co c="0"><na f="g/Goto:Eiichi" pid="58/1803">Eiichi Goto</na></co>
<co c="0"><na f="i/Ishida:Haruhisa" pid="82/3862">Haruhisa Ishida</na></co>
<co c="0"><na f="m/Miatsu=Oka:Yasushi" pid="182/9779">Yasushi Miatsu-Oka</na></co>
<co c="0"><na f="m/Moto=Oka:Tohru" pid="71/6241">Tohru Moto-Oka</na></co>
<co c="0"><na f="m/Murata:Kenro" pid="182/9777">Kenro Murata</na></co>
<co c="0"><na f="n/Nakagawa:Keisuke" pid="151/9379">Keisuke Nakagawa</na></co>
<co c="0"><na f="n/Nakazawa:Kisaburo" pid="76/2485">Kisaburo Nakazawa</na></co>
<co c="0"><na f="s/Soma:Takashi" pid="79/7684">Takashi Soma</na></co>
<co c="0"><na f="w/Wada:Eiiti" pid="02/5279">Eiiti Wada</na></co>
</coauthors>
</dblpperson>

