<?xml version="1.0"?>
<dblpperson name="Chieh-Fan Lai" pid="152/0797" n="1">
<person key="homepages/152/0797" mdate="2014-10-08">
<author pid="152/0797">Chieh-Fan Lai</author>
</person>
<r><article key="journals/tcas/TsengLC14" mdate="2020-05-22">
<author pid="117/6619">Chien-Jian Tseng</author>
<author pid="152/0797">Chieh-Fan Lai</author>
<author orcid="0000-0002-7666-4984" pid="76/1237">Hsin-Shu Chen</author>
<title>A 6-Bit 1 GS/s Pipeline ADC Using Incomplete Settling With Background Sampling-Point Calibration.</title>
<pages>2805-2815</pages>
<year>2014</year>
<volume>61-I</volume>
<journal>IEEE Trans. Circuits Syst. I Regul. Pap.</journal>
<number>10</number>
<ee>https://doi.org/10.1109/TCSI.2014.2333672</ee>
<url>db/journals/tcas/tcasI61.html#TsengLC14</url>
</article>
</r>
<coauthors n="2" nc="1">
<co c="0"><na f="c/Chen:Hsin=Shu" pid="76/1237">Hsin-Shu Chen</na></co>
<co c="0"><na f="t/Tseng:Chien=Jian" pid="117/6619">Chien-Jian Tseng</na></co>
</coauthors>
</dblpperson>

