Thermal Noise Analysis of Ring Amplifier in Cyclic Analog-to-Digital Converter.

Tatsuji Matsuura

Eiki Kayama Kenta Mori Taichi Maebou Yuanchi Chen Hao San Tatsuji Matsuura Masao Hotta Thermal Noise Analysis of Ring Amplifier in Cyclic Analog-to-Digital Converter. 823-831 2023 May 106 IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 5 https://doi.org/10.1587/transfun.2022gcp0003 db/journals/ieiceta/ieiceta106.html#KayamaMMCSMH23

Satoshi Sekine Tatsuji Matsuura Ryo Kishida Akira Hyogo Digital Calibration Algorithm of Conversion Error Influenced by Parasitic Capacitance in C-C SAR-ADC Based on γ-Estimation. 516-524 2021 104-A IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 2 http://search.ieice.org/bin/summary.php?id=e104-a_2_516 db/journals/ieiceta/ieiceta104.html#SekineMKH21

Eiki Kayama Kenta Mori Taichi Maebou Yuanchi Chen Hao San Tatsuji Matsuura Masao Hotta A 0.8V 14bit 294kSPS non-binary cyclic ADC in 65nm SOTB CMOS technology. 1-2 2021 ISPACS https://doi.org/10.1109/ISPACS51563.2021.9650976 conf/ispacs/2021 db/conf/ispacs/ispacs2021.html#KayamaMTCSMH21 Taichi Maebou Yuanchi Chen Eiki Kayama Kenta Mori Hao San Tatsuji Matsuura Masao Hotta A 0.7V 14bit Hybrid ADC in 65nm SOTB CMOS. 1-2 2021 ISPACS https://doi.org/10.1109/ISPACS51563.2021.9651022 conf/ispacs/2021 db/conf/ispacs/ispacs2021.html#MaebouCKMSMH21 Kenta Mori Eiki Kayama Taichi Maebou Yuanchi Chen Hao San Tatsuji Matsuura Masao Hotta A Low-voltage Non-binary Cyclic ADC using Fully Differential Ring Amplifier. 1-2 2021 ISPACS https://doi.org/10.1109/ISPACS51563.2021.9651059 conf/ispacs/2021 db/conf/ispacs/ispacs2021.html#MoriKMCSMH21 Yuichiro Kobayashi Tatsuji Matsuura Ryo Kishida Akira Hyogo Investigation of Hybrid ADC Combined with First-order Feedforward Incremental and SAR ADCs. 1-2 2019 ISPACS https://doi.org/10.1109/ISPACS48206.2019.8986265 conf/ispacs/2019 db/conf/ispacs/ispacs2019.html#KobayashiMKH19 Yuki Tanaka Tatsuji Matsuura Ryo Kishida Akira Hyogo Duty Ratio and Capacitance Analysis of AC/DC Converter without Current Control Circuit. 1-2 2019 ISPACS https://doi.org/10.1109/ISPACS48206.2019.8986275 conf/ispacs/2019 db/conf/ispacs/ispacs2019.html#TanakaMKH19 Yuichiro Unno Tatsuji Matsuura Ryo Kishida Akira Hyogo Examination of Incremental ADC with SAR ADC to Reduce Conversion Time with High Accuracy. 1-2 2019 ISPACS https://doi.org/10.1109/ISPACS48206.2019.8986286 conf/ispacs/2019 db/conf/ispacs/ispacs2019.html#UnnoMKH19 Shuichiro Yamada Toshiki Ohtsu Minami Sasaki Hao San Tatsuji Matsuura Masao Hotta A 0.8V 14bit 62.5kSPS non-binary cyclic ADC using SOTB CMOS technology. 1-2 2019 ISPACS https://doi.org/10.1109/ISPACS48206.2019.8986371 conf/ispacs/2019 db/conf/ispacs/ispacs2019.html#YamadaOSSMH19 Satoshi Sekine Tatsuji Matsuura Ryo Kishida Akira Hyogo A Novel C-2αC Ladder Based Non-binary DAC for SAR-ADC Using Unit Capacitors. 457-462 2018 ISPACS https://doi.org/10.1109/ISPACS.2018.8923156 conf/ispacs/2018 db/conf/ispacs/ispacs2018.html#SekineMKH18

Hao San Rompei Sugawara Masao Hotta Tatsuji Matsuura Kazuyuki Aihara A 12-bit 1.25MS/s Area-Efficient Radix-Value Self-Estimated Non-Binary Cyclic ADC with Relaxed Requirements on Analog Components. 534-540 2017 100-A IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 2 https://doi.org/10.1587/transfun.E100.A.534 http://search.ieice.org/bin/summary.php?id=e100-a_2_534 db/journals/ieicet/ieicet100a.html#SanSHMA17

Yuki Watanabe Hayato Narita Hiroyuki Tsuchiya Tatsuji Matsuura Hao San Masao Hotta A 14bit 80kSPS non-binary cyclic ADC without high accuracy analog components. 15-16 2017 ASP-DAC https://doi.org/10.1109/ASPDAC.2017.7858279 conf/aspdac/2017 db/conf/aspdac/aspdac2017.html#WatanabeNTMSH17 Hiroyuki Tsuchiya Asato Uchiyama Yuta Misima Yuki Watanabe Tatsuji Matsuura Hao San Masao Hotta Non-binary cyclic ADC with correlated level shifting technique. 17-18 2017 ASP-DAC https://doi.org/10.1109/ASPDAC.2017.7858280 conf/aspdac/2017 db/conf/aspdac/aspdac2017.html#TsuchiyaUMWMSH17 Koken Chin Yuta Mishima Yuki Watanabe Hiroyuki Tsuchiya Hao San Tatsuji Matsuura Masao Hotta A 12-Bit 3.3MS/S pipeline cyclic ADC with correlated level shifting technique. 602-605 2017 ISPACS https://doi.org/10.1109/ISPACS.2017.8266549 conf/ispacs/2017 db/conf/ispacs/ispacs2017.html#ChinMWTSMH17 Hiroyuki Tsuchiya Yuki Watanabe Koken Chin Hao San Tatsuji Matsuura Masao Hotta The design of a 14-bit 400kSPS non-binary pipeline cyclic ADC. 606-610 2017 ISPACS https://doi.org/10.1109/ISPACS.2017.8266550 conf/ispacs/2017 db/conf/ispacs/ispacs2017.html#TsuchiyaWCSMH17 Yuki Watanabe Koken Chin Hiroyuki Tsuchiya Hao San Tatsuji Matsuura Masao Hotta Experimental results of reconfigurable non-binary cyclic ADC. 611-615 2017 ISPACS https://doi.org/10.1109/ISPACS.2017.8266551 conf/ispacs/2017 db/conf/ispacs/ispacs2017.html#WatanabeCTSMH17 Tatsuji Matsuura Integrated CMOS ADC - Tutorial review on recent hybrid SAR-ADCs. 29-34 2017 MIXDES https://doi.org/10.23919/MIXDES.2017.8004589 conf/mixdes/2017 db/conf/mixdes/mixdes2017.html#Matsuura17 Kota Inoue Tatsuji Matsuura Akira Hyogo Hao San Non-binary cyclic and binary SAR hybrid ADC. 105-109 2017 MIXDES https://doi.org/10.23919/MIXDES.2017.8005163 conf/mixdes/2017 db/conf/mixdes/mixdes2017.html#InoueMHS17

Junya Matsuno Masanori Furuta Tetsuro Itakura Tatsuji Matsuura Akira Hyogo A Replica-Amp Gain Enhancement Technique for an Operational Amplifier with Low Mismatch Sensitivity and High Voltage Swing. 547-554 2016 99-A IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 2 https://doi.org/10.1587/transfun.E99.A.547 http://search.ieice.org/bin/summary.php?id=e99-a_2_547 db/journals/ieicet/ieicet99a.html#MatsunoFIMH16

Yuta Mishima Toshiki Yamada Asato Uchiyama Tatsuji Matsuura Hao San Masao Hotta A 10-bit 10Ms/s pipeline cyclic ADC based on β-expansion. 294-298 2015 ISPACS https://doi.org/10.1109/ISPACS.2015.7432783 conf/ispacs/2015 db/conf/ispacs/ispacs2015.html#MishimaYUMSH15

Hideo Nakane Ryuichi Ujiie Takashi Oshima Takaya Yamamoto Keisuke Kimura Yuichi Okuda Kosuke Tsuiji Tatsuji Matsuura A Fully Integrated SAR ADC Using Digital Correction Technique for Triple-Mode Mobile Transceiver. 2503-2514 2014 49 IEEE J. Solid State Circuits 11 https://doi.org/10.1109/JSSC.2014.2357436 db/journals/jssc/jssc49.html#NakaneUOYKOTM14

Hao San Rompei Sugawara Masao Hotta Tatsuji Matsuura Kazuyuki Aihara An area-efficient 12-bit 1.25MS/s radix-value self-estimated non-binary ADC with relaxed requirements on analog components. 1-4 2014 CICC https://doi.org/10.1109/CICC.2014.6946123 conf/cicc/2014 db/conf/cicc/cicc2014.html#SanSHMA14

Satoshi Uemori Masamichi Ishii Haruo Kobayashi 0001 Daiki Hirabayashi Yuta Arakawa Yuta Doi Osamu Kobayashi Tatsuji Matsuura Kiichi Niitsu Yuji Yano Tatsuhiro Gake Takahiro J. Yamaguchi Nobukazu Takai Multi-bit Sigma-Delta TDC Architecture with Improved Linearity. 879-892 2013 29 J. Electron. Test. 6 https://doi.org/10.1007/s10836-013-5408-6 db/journals/et/et29.html#UemoriIKHADKMNYGYT13

Satoshi Uemori Masamichi Ishii Haruo Kobayashi 0001 Yuta Doi Osamu Kobayashi Tatsuji Matsuura Kiichi Niitsu Yuta Arakawa Daiki Hirabayashi Yuji Yano Tatsuhiro Gake Nobukazu Takai Takahiro J. Yamaguchi Multi-bit sigma-delta TDC architecture with self-calibration. 671-674 2012 APCCAS https://doi.org/10.1109/APCCAS.2012.6419124 conf/apccas/2012 db/conf/apccas/apccas2012.html#UemoriIKDKMNAHYGTY12

Takuya Yagi Kunihiko Usui Tatsuji Matsuura Satoshi Uemori Satoshi Ito Yohei Tan Haruo Kobayashi 0001 Background Self-Calibration Algorithm for Pipelined ADC Using Split ADC Scheme. 1233-1236 2011 94-C IEICE Trans. Electron. 7 https://doi.org/10.1587/transele.E94.C.1233 http://search.ieice.org/bin/summary.php?id=e94-c_7_1233 db/journals/ieicet/ieicet94c.html#YagiUMUITK11

Tomohiko Ogawa Haruo Kobayashi 0001 Yosuke Takahashi Nobukazu Takai Masao Hotta Hao San Tatsuji Matsuura Akira Abe Katsuyoshi Yagi Toshihiko Mori SAR ADC Algorithm with Redundancy and Digital Error Correction. 415-423 2010 93-A IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 2 https://doi.org/10.1587/transfun.E93.A.415 http://search.ieice.org/bin/summary.php?id=e93-a_2_415 db/journals/ieicet/ieicet93a.html#OgawaKTTHSMAYM10

Tomohiko Ogawa Tatsuji Matsuura Haruo Kobayashi 0001 Nobukazu Takai Masao Hotta Hao San Akira Abe Katsuyoshi Yagi Toshihiko Mori Non-binary SAR ADC with digital error correction for low power applications. 196-199 2010 APCCAS https://doi.org/10.1109/APCCAS.2010.5774747 conf/apccas/2010 db/conf/apccas/apccas2010.html#OgawaMKTHSAYM10 Takuya Yagi Kunihiko Usui Tatsuji Matsuura Satoshi Uemori Yohei Tan Satoshi Ito Haruo Kobayashi 0001 Background calibration algorithm for pipelined ADC with open-loop residue amplifier using split ADC structure. 200-203 2010 APCCAS https://doi.org/10.1109/APCCAS.2010.5774756 conf/apccas/2010 db/conf/apccas/apccas2010.html#YagiUMUTIK10 Tomohiko Ogawa Haruo Kobayashi 0001 Yohei Tan Satoshi Ito Satoshi Uemori Nobukazu Takai Kiichi Niitsu Takahiro J. Yamaguchi Tatsuji Matsuura Nobuyoshi Ishikawa SAR ADC that is configurable to optimize yield. 374-377 2010 APCCAS https://doi.org/10.1109/APCCAS.2010.5774845 conf/apccas/2010 db/conf/apccas/apccas2010.html#OgawaKTIUTNYMI10

Tatsuo Nakagawa Tatsuji Matsuura Eiki Imaizumi Junya Kudoh Goichi Ono Masayuki Miyazaki 1-GHz Input Bandwidth Under-Sampling A/D Converter with Dynamic Current Reduction Comparator for UWB-IR Receiver. 835-842 2009 92-C IEICE Trans. Electron. 6 https://doi.org/10.1587/transele.E92.C.835 http://search.ieice.org/bin/summary.php?id=e92-c_6_835&category=C&year=2009&lang=E&abst= db/journals/ieicet/ieicet92c.html#NakagawaMIKOM09

Takaya Yamamoto Masumi Kasahara Tatsuji Matsuura A 63 mA 112/94 dB DR IF Bandpass ΔΣ Modulator With Direct Feed-Forward Compensation and Double Sampling. 1783-1794 2008 43 IEEE J. Solid State Circuits 8 https://doi.org/10.1109/JSSC.2008.925618 db/journals/jssc/jssc43.html#YamamotoKM08

Hao San Yoshitaka Jingu Hiroki Wada Hiroyuki Hagiwara Akira Hayakawa Haruo Kobayashi 0001 Tatsuji Matsuura Kouichi Yahagi Junya Kudoh Hideo Nakane Masao Hotta Toshiro Tsukada Koichiro Mashiko Atsushi Wada A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm. 1181-1188 2007 90-C IEICE Trans. Electron. 6 https://doi.org/10.1093/ietele/e90-c.6.1181 db/journals/ieicet/ieicet90c.html#SanJWHHKMYKNHTMW07

Takaya Yamamoto Masumi Kasahara Tatsuji Matsuura A 63-mA 112/94-dB DR IF bandpass ΔΣ modulator with direct feed-forward and double sampling. 61-64 2007 CICC https://doi.org/10.1109/CICC.2007.4405681 conf/cicc/2007 db/conf/cicc/cicc2007.html#YamamotoKM07 Tatsuo Nakagawa Tatsuji Matsuura Eiki Imaizumi Junya Kudoh Goichi Ono Masayuki Miyazaki Akira Maeki Yuji Ogata Shinsuke Kobayashi Noboru Koshizuka Ken Sakamura 1-GHz Input bandwidth 6-bit under-sampling A/D converter for UWB-IR receiver. 163-166 2007 ESSCIRC https://doi.org/10.1109/ESSCIRC.2007.4430271 conf/esscirc/2007 db/conf/esscirc/esscirc2007.html#NakagawaMIKOMMO07 Zhongyuan Chang Tatsuji Matsuura ΔΣ ADCs and Converter Techniques. 236-237 2007 ISSCC https://doi.org/10.1109/ISSCC.2007.373381 conf/isscc/2007 db/conf/isscc/isscc2007.html#ChangM07

Yasutoshi Aibara Eiki Imaizumi Hiroaki Takagishi Tatsuji Matsuura A Novel False Lock Detection Technique for a Wide Frequency Range Delay-Locked Loop. 385-390 2006 89-A IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 2 https://doi.org/10.1093/ietfec/e89-a.2.385 db/journals/ieicet/ieicet89a.html#AibaraITM06

Hao San Akira Hayakawa Yoshitaka Jingu Hiroki Wada Hiroyuki Hagiwara Kazuyuki Kobayashi Haruo Kobayashi 0001 Tatsuji Matsuura Kouichi Yahagi Junya Kudoh Hideo Nakane Masao Hotta Toshiro Tsukada Koichiro Mashiko Atsushi Wada Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout. 908-915 2006 89-A IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 4 https://doi.org/10.1093/ietfec/e89-a.4.908 db/journals/ieicet/ieicet89a.html#SanHJWHKKMYKNHTMW06

Masao Hotta Tatsuji Matsuura Key Technologies for Miniaturization and Power Reduction of Analog-to-Digital Converters for Video Use. 664-672 2006 89-C IEICE Trans. Electron. 6 https://doi.org/10.1093/ietele/e89-c.6.664 db/journals/ieicet/ieicet89c.html#HottaM06

Tatsuji Matsuura Takashi Nara Tatsuya Komatsu Eiki Imaizumi Toshihiro Matsutsuru Ryutaro Horita Haruto Katsu Shintaro Suzumura Kazuo Sato A 240-Mbps, 1-W CMOS EPRML read-channel LSI chip using an interleaved subranging pipeline A/D converter. 1840-1850 1998 33 IEEE J. Solid State Circuits 11 https://doi.org/10.1109/4.726586 db/journals/jssc/jssc33.html#MatsuuraNKIMHKS98

Koichi Ono Tatsuji Matsuura Eiki Imaizumi Hisashi Okazawa Ryuushi Shimokawa Error suppressing encode logic of FCDL in a 6-b flash A/D converter. 1460-1464 1997 32 IEEE J. Solid State Circuits 9 https://doi.org/10.1109/4.628765 db/journals/jssc/jssc32.html#OnoMIOS97

Keiko Makie-Fukuda Takanobu Anbo Toshiro Tsukada Tatsuji Matsuura Masao Hotta Voltage-comparator-based measurement of equivalently sampled substrate noise waveforms in mixed-signal integrated circuits. 726-731 1996 31 IEEE J. Solid State Circuits 5 https://doi.org/10.1109/4.509856 db/journals/jssc/jssc31.html#Makie-FukudaATM96

Keiko Makie-Fukuda Takanobu Anbo Toshiro Tsukada Tatsuji Matsuura Masao Hotta Correction to "Voltage-Comparator-Based Measurement of Equivalentiy Samlpled Substrate Noise Wavefor. 1226 1996 31 IEEE J. Solid State Circuits 8 https://doi.org/10.1109/JSSC.1996.508275 db/journals/jssc/jssc31.html#Makie-FukudaATM96a

Keiko Makie-Fukuda Takafumi Kikuchi Tatsuji Matsuura Masao Hotta Measurement of digital noise in mixed-signal integrated circuits. 87-92 1995 February 30 IEEE J. Solid State Circuits 2 https://doi.org/10.1109/4.341734 db/journals/jssc/jssc30.html#MakieFukudaKMH95

Akira Abe Yasutoshi Aibara Kazuyuki Aihara Takanobu Anbo Yuta Arakawa Zhongyuan Chang Yuanchi Chen Koken Chin Yuta Doi Masanori Furuta Tatsuhiro Gake Hiroyuki Hagiwara Akira Hayakawa Daiki Hirabayashi Ryutaro Horita Masao Hotta Akira Hyogo Eiki Imaizumi Kota Inoue Masamichi Ishii Nobuyoshi Ishikawa Tetsuro Itakura Satoshi Ito Yoshitaka Jingu Masumi Kasahara Haruto Katsu Eiki Kayama Takafumi Kikuchi Keisuke Kimura Ryo Kishida Haruo Kobayashi 0001 Kazuyuki Kobayashi Osamu Kobayashi Shinsuke Kobayashi Yuichiro Kobayashi Tatsuya Komatsu Noboru Koshizuka Junya Kudoh Taichi Maebou Akira Maeki Keiko Makie-Fukuda Koichiro Mashiko Junya Matsuno Toshihiro Matsutsuru Yuta MishimaYuta Misima Masayuki Miyazaki Kenta Mori Toshihiko Mori Tatsuo Nakagawa Hideo Nakane Takashi Nara Hayato Narita Kiichi Niitsu Yuji Ogata Tomohiko Ogawa Toshiki Ohtsu Hisashi Okazawa Yuichi Okuda Goichi Ono Koichi Ono Takashi Oshima Ken Sakamura Hao San Minami Sasaki Kazuo Sato Satoshi Sekine Ryuushi Shimokawa Rompei Sugawara Shintaro Suzumura Hiroaki Takagishi Yosuke Takahashi Nobukazu Takai Yohei Tan Yuki Tanaka Hiroyuki Tsuchiya Kosuke Tsuiji Toshiro Tsukada Asato Uchiyama Satoshi Uemori Ryuichi Ujiie Yuichiro Unno Kunihiko Usui Atsushi Wada Hiroki Wada Yuki Watanabe Katsuyoshi Yagi Takuya Yagi Kouichi Yahagi Shuichiro Yamada Toshiki Yamada Takahiro J. Yamaguchi Takaya Yamamoto Yuji Yano