{"id":603,"date":"2019-10-22T15:15:07","date_gmt":"2019-10-22T09:45:07","guid":{"rendered":"https:\/\/binaryterms.com\/?p=603"},"modified":"2019-11-08T15:07:52","modified_gmt":"2019-11-08T09:37:52","slug":"register-organization","status":"publish","type":"post","link":"https:\/\/binaryterms.com\/register-organization.html","title":{"rendered":"Register Organization"},"content":{"rendered":"<p><strong>Register organization<\/strong> is the arrangement of the registers in the processor. The processor designers decide the organization of the registers in a processor. Different processors may have different register organization. Depending on the roles played by the registers they can be categorized into <strong>two types<\/strong>, user-visible register and control and status register.<\/p>\n<p>Before learning register organization in brief, let us discuss what is register?<\/p>\n<h2>What is Register?<\/h2>\n<p><strong>Registers<\/strong> are the <em>smaller<\/em> and the <em>fastest<\/em> accessible <strong>memory units<\/strong> in the central processing unit (CPU). According to memory hierarchy, the registers in the processor, function a <strong>level above<\/strong> the <strong>main memory<\/strong> and <strong>cache memory<\/strong>. The registers used by the central unit are also called as <strong>processor registers<\/strong>.<\/p>\n<p>A register can hold the <em>instruction, address location, or operands<\/em>. Sometimes, the instruction has register as a part of itself.<\/p>\n<h2>Types of Registers<\/h2>\n<p>As we have discussed above, registers can be organized into two main categories i.e. the <strong>User-Visible Registers<\/strong> and the <strong>Control and Status Registers<\/strong>. Although we can\u2019t separate the registers in the processors clearly among these two categories.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter size-full wp-image-634\" src=\"https:\/\/binaryterms.com\/wp-content\/uploads\/2019\/10\/Register-Organization-1.jpg\" alt=\"Register Organization\" width=\"591\" height=\"326\" srcset=\"https:\/\/binaryterms.com\/wp-content\/uploads\/2019\/10\/Register-Organization-1.jpg 591w, https:\/\/binaryterms.com\/wp-content\/uploads\/2019\/10\/Register-Organization-1-300x165.jpg 300w\" sizes=\"auto, (max-width: 591px) 100vw, 591px\" \/><\/p>\n<p>This is because in some processors, a register may be user-visible and in some, the same may not be user-visible. But for our rest of discussion regarding register organization, we will consider these two categories of register.<\/p>\n<ol>\n<li><a href=\"#UserVisibleRegisters\">User Visible Registers<\/a>\n<ul>\n<li><a href=\"#GeneralPurposeRegister\">General Purpose Register<\/a><\/li>\n<li><a href=\"#DataRegister\">Data Register<\/a><\/li>\n<li><a href=\"#AddressRegister\">Address Register<\/a><\/li>\n<li><a href=\"#ConditionCodes\">Condition Codes<\/a><\/li>\n<\/ul>\n<\/li>\n<li><a href=\"#ControlandStatusRegisters\">Control and Status Registers<\/a>\n<ul>\n<li><a href=\"#ProgramCounter\">Program Counter<\/a><\/li>\n<li><a href=\"#InstructionRegister\">Instruction Register<\/a><\/li>\n<li><a href=\"#MemoryAddressRegister\">Memory Address Register<\/a><\/li>\n<li><a href=\"#MemoryBufferRegister\">Memory Buffer Register<\/a><\/li>\n<\/ul>\n<\/li>\n<\/ol>\n<p><a name=\"UserVisibleRegisters\"><\/a><\/p>\n<h3>User-Visible Registers<\/h3>\n<p>These registers are visible to the assembly or machine language programmers and they use them effectively to <strong>minimize the memory references<\/strong> in the instructions. Well, these registers can only be <strong>referenced using the machine or assembly language.<\/strong><\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter size-full wp-image-631\" src=\"https:\/\/binaryterms.com\/wp-content\/uploads\/2019\/10\/User-Visible-Registers.jpg\" alt=\"User Visible Registers\" width=\"600\" height=\"159\" srcset=\"https:\/\/binaryterms.com\/wp-content\/uploads\/2019\/10\/User-Visible-Registers.jpg 600w, https:\/\/binaryterms.com\/wp-content\/uploads\/2019\/10\/User-Visible-Registers-300x80.jpg 300w\" sizes=\"auto, (max-width: 600px) 100vw, 600px\" \/><\/p>\n<p>The registers that fall in this category are discussed below:<br \/>\n<a name=\"GeneralPurposeRegister\"><\/a><\/p>\n<h3>1. General Purpose Register<\/h3>\n<p>The general-purpose registers detain both the <strong>addresses<\/strong> or the <strong>data<\/strong>. Although we have separate <strong>data registers<\/strong> and <strong>address registers<\/strong>. The general purpose register also accepts the <strong>intermediate results<\/strong> in the course of program execution.<\/p>\n<p>Well, the programmers can <strong>restrict<\/strong> some of the general-purpose registers to <strong>specific functions<\/strong>. Like, some registers are specifically used for stack operations or for floating-point operations. The general-purpose register can also be employed for the <strong>addressing functions.<\/strong><br \/>\n<a name=\"DataRegister\"><\/a><\/p>\n<h3>2. Data Register<\/h3>\n<p>The term itself describes that these registers are employed to <strong>hold the data<\/strong>. But the programmers <strong>can\u2019t<\/strong> use these registers for <strong>calculating operand address<\/strong>.<br \/>\n<a name=\"AddressRegister\"><\/a><\/p>\n<h3>3. Address Register<\/h3>\n<p>Now, the address registers contain the <strong>address of an operand<\/strong> or it can also act as a <strong>general-purpose register<\/strong>. An address register may be dedicated to a certain <strong>addressing mode<\/strong>. Let us understand this with the examples.<\/p>\n<p><strong>(a) Segment Pointer Register<br \/>\n<\/strong>A memory divided in segments, requires a segment register to <strong>hold the base address of the segment<\/strong>. There can be multiple segment registers. As one segment register can be employed to hold the base address of the segment occupied by the operating system. The other segment register can hold the base address of the segment allotted to the processor.<\/p>\n<p><strong>(b) Index Register<br \/>\n<\/strong>The index register is employed for <strong>indexed addressing<\/strong> and it is <strong>initial value<\/strong> is <strong>0<\/strong>. Generally, it used for traversing the memory locations. After each reference, the index register is <strong>incremented or decremented by 1<\/strong>, depending upon the nature of the operation.<br \/>\nSometime the index register may be<strong> auto indexed<\/strong>.<\/p>\n<p><strong>(c) Stack Pointer Register<br \/>\n<\/strong>The stack register has the address that points the <strong>stack top<\/strong>.<br \/>\n<a name=\"ConditionCodes\"><\/a><\/p>\n<h4>4. Condition Code<\/h4>\n<p>Condition codes are the flag bits which are the part of the control register. The condition codes are set by the processor as a result of an operation and they are implicitly read through the machine instruction.<\/p>\n<p>The programmers are not allowed to alter the conditional codes. Generally, the condition codes are tested during conditional branch operation.<br \/>\n<a name=\"ControlandStatusRegisters\"><\/a><\/p>\n<h3>Control and Status Registers<\/h3>\n<p>The control and status register holds the <strong>address or data<\/strong> that is important to <strong>control the processor\u2019s operation<\/strong>. The most important thing is that these registers are <strong>not visible<\/strong> to the users.\u00a0Below we will discuss all the control and status registers are <strong>essential for the execution of an instruction<\/strong>.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter size-full wp-image-632\" src=\"https:\/\/binaryterms.com\/wp-content\/uploads\/2019\/10\/Control-and-Status-Registers.jpg\" alt=\"Control and Status Registers\" width=\"600\" height=\"159\" srcset=\"https:\/\/binaryterms.com\/wp-content\/uploads\/2019\/10\/Control-and-Status-Registers.jpg 600w, https:\/\/binaryterms.com\/wp-content\/uploads\/2019\/10\/Control-and-Status-Registers-300x80.jpg 300w\" sizes=\"auto, (max-width: 600px) 100vw, 600px\" \/><\/p>\n<p><a name=\"ProgramCounter\"><\/a><\/p>\n<h3>1. Program Counter<\/h3>\n<p>The program counter is a processor register that holds the <strong>address of the instruction that has to be executed next<\/strong>. It is a processor which updates the program counter with the address of the next instruction to be fetched for execution.<br \/>\n<a name=\"InstructionRegister\"><\/a><\/p>\n<h3>2. Instruction Register<\/h3>\n<p>Instruction register has the <strong>instruction that is currently fetched<\/strong>. It helps in analysing the opcode and operand present in the instruction.<br \/>\n<a name=\"MemoryAddressRegister\"><\/a><\/p>\n<h3>3. Memory Address Register (MAR)<\/h3>\n<p>Memory address register holds the <strong>address of a memory location<\/strong>.<br \/>\n<a name=\"MemoryBufferRegister\"><\/a><\/p>\n<h3>4. Memory Buffer Register (MBR)<\/h3>\n<p>The memory buffer register holds the data that has to be <strong>written to a memory location<\/strong> or it holds the data that is <strong>recently been read<\/strong>.<\/p>\n<p>The memory address registers (MAR) and memory buffer registers (MBR) are used to <strong>move the data<\/strong> between <strong>processor<\/strong> and <strong>memory<\/strong>.<\/p>\n<p>Apart from the above registers, several processors have a register termed as <strong>Program Status Word (PSW)<\/strong>. As the word suggests it contains the <strong>status information<\/strong>.<\/p>\n<p>The fields included in <strong>Program Status Word (PSW)<\/strong>:<\/p>\n<ul>\n<li style=\"list-style-type: none\">\n<ul>\n<li><strong>Sign:<\/strong> This field has the <em>resultant sign bit<\/em> of the last arithmetic operation performed.<\/li>\n<li><strong>Zero:<\/strong> This field is set when the result of the operation is <em>zero<\/em>.<\/li>\n<li><strong>Carry:<\/strong> This field is set when an arithmetic operation results in a <em>carry into<\/em> or <em>borrow out<\/em>.<\/li>\n<li><strong>Equal:<\/strong> If a <em>logical operation<\/em> results in, <em>equality<\/em> the Equal bit is set.<\/li>\n<li><strong>Overflow:<\/strong> This bit indicates the <em>arithmetic overflow<\/em>.<\/li>\n<li><strong>Interrupt:<\/strong> This bit is set to <em>enable<\/em> or <em>disable<\/em> the interrupts.<\/li>\n<li><strong>Supervisor:<\/strong> This bit indicates whether the processor is executing in the <em>supervisor mode<\/em> or the <em>user mode<\/em>.<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n<p>So, these are the types of registers a processor has. The processor designer organizes the registers according to the requirement of the processor.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Register organization is the arrangement of the registers in the processor. The processor designers decide the organization of the registers in a processor. Different processors may have different register organization. Depending on the roles played by the registers they can be categorized into two types, user-visible register and control and status register. Before learning register [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_genesis_hide_title":false,"_genesis_hide_breadcrumbs":false,"_genesis_hide_singular_image":false,"_genesis_hide_footer_widgets":false,"_genesis_custom_body_class":"","_genesis_custom_post_class":"","_genesis_layout":"","footnotes":""},"categories":[3],"tags":[],"class_list":{"0":"post-603","1":"post","2":"type-post","3":"status-publish","4":"format-standard","6":"category-computer-architecture","7":"entry"},"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v26.6 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>What is Register Organization? What is Register? Types of Register - Binary Terms<\/title>\n<meta name=\"description\" content=\"Register organization is the arrangement of the registers in the processor. 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