{"id":514,"date":"2019-10-10T17:24:29","date_gmt":"2019-10-10T11:54:29","guid":{"rendered":"https:\/\/binaryterms.com\/?p=514"},"modified":"2019-10-11T09:39:43","modified_gmt":"2019-10-11T04:09:43","slug":"direct-memory-access-dma","status":"publish","type":"post","link":"https:\/\/binaryterms.com\/direct-memory-access-dma.html","title":{"rendered":"Direct Memory Access (DMA)"},"content":{"rendered":"

Direct Memory Access<\/strong> (DMA) transfers the block of data between the memory<\/em> and peripheral devices<\/em> of the system, without the participation <\/strong>of the processor<\/strong>. The unit that controls the activity of accessing memory directly is called a DMA controller<\/strong>.<\/p>\n

The processor relinquishes the system bus<\/strong> for a few clock cycles. So, the DMA controller can accomplish the task of data transfer via the system bus. In this section, we will study in brief about DMA, DMA controller, registers, advantages and disadvantages. So let us start.<\/p>\n

Content: Direct Memory Access in Computer Architecture<\/h2>\n
    \n
  1. What is DMA and Why it is used?<\/a><\/li>\n
  2. DMA Controller’s Working<\/a><\/li>\n
  3. DMA Block Diagram<\/a><\/li>\n
  4. Advantages and Disadvantages<\/a><\/li>\n
  5. Key Takeaways<\/a><\/li>\n<\/ol>\n

    <\/a><\/p>\n

    What is DMA and Why it is used?<\/h3>\n

    Direct memory access (DMA) is a mode of data transfer<\/strong> between the memory and I\/O devices. This happens without the involvement<\/strong> of the processor. We have two other methods of data transfer, programmed I\/O<\/strong> and Interrupt driven I\/O<\/strong>. Let\u2019s revise each and get acknowledge with their drawbacks.<\/p>\n

    In programmed I\/O<\/strong>, the processor keeps on scanning whether any device is ready for data transfer. If an I\/O device is ready, the processor fully dedicates<\/strong>\u00a0itself in transferring the data between I\/O and memory. It transfers data at a high rate, but it can\u2019t get involved in any other activity<\/strong> during data transfer. This is the major drawback<\/strong> of programmed I\/O.<\/p>\n

    In Interrupt driven I\/O<\/strong>, whenever the device is ready for data transfer, then it raises an interrupt to processor<\/strong>. Processor completes executing its ongoing instruction and saves its current state. It then switches to data transfer which causes a delay<\/strong>. Here, the processor doesn’t keep scanning for peripherals ready for data transfer. But, it is fully involved<\/strong> in the data transfer process. So, it is also not an effective way of data transfer.<\/p>\n

    The above two modes of data transfer are not useful for transferring a large block of data. But, the DMA controller completes this task at a faster rate and is also effective for transfer of large data block.<\/p>\n

    The DMA controller transfers the data in three modes:<\/p>\n

      \n
    1. Burst Mode: <\/strong>Here, once the DMA controller gains the charge of the system bus, then it releases the system bus only after completion<\/strong> of data transfer. Till then the CPU has to wait for the system buses.<\/li>\n
    2. Cycle Stealing Mode:<\/strong> In this mode, the DMA controller forces<\/strong> the CPU to stop its operation and relinquish the control over the bus\u00a0<\/strong>for a short term<\/strong> to DMA controller. After the transfer of every byte<\/strong>, the DMA controller releases<\/strong> the bus <\/strong>and then again requests for the system bus. In this way, the DMA controller steals the clock cycle for transferring every byte.<\/li>\n
    3. Transparent Mode:<\/strong> Here, the DMA controller takes the charge of system bus only if the processor does not require the system bus<\/strong>.<\/li>\n<\/ol>\n

      <\/a><\/p>\n

      Direct Memory Access Controller & it’s Working<\/h3>\n

      DMA controller is a hardware unit<\/strong> that allows I\/O devices to access memory directly without the participation of the processor. Here, we will discuss the working of the DMA controller. Below we have the diagram of DMA controller that explains its working:<\/p>\n

      \"Direct<\/p>\n

        \n
      1. Whenever an I\/O device wants to transfer the data to or from memory, it sends the DMA request (DRQ<\/strong>) to the DMA controller. DMA controller accepts this DRQ and asks the CPU to hold for a few clock cycles by sending it the Hold request (HLD<\/strong>).<\/li>\n
      2. CPU receives the Hold request (HLD) from DMA controller and relinquishes the bus and sends the Hold acknowledgement (HLDA<\/strong>) to DMA controller.<\/li>\n
      3. After receiving the Hold acknowledgement (HLDA), DMA controller acknowledges I\/O device (DACK)<\/strong> that the data transfer can be performed and DMA controller takes the charge of the system bus and transfers the data to or from memory.<\/li>\n
      4. When the data transfer is accomplished, the DMA raise an interrupt<\/strong> to let know the processor that the task of data transfer is finished and the processor can take control over the bus again and start processing where it has left.<\/li>\n<\/ol>\n

        Now the DMA controller can be a separate unit that is shared by various I\/O devices, or it can also be a part of the I\/O device interface.
        \n        <\/a><\/p>\n

        Direct Memory Access Diagram<\/h3>\n

        After exploring the working of DMA controller, let us discuss the block diagram of the DMA controller. Below we have a block diagram of DMA controller.<\/p>\n

        \"Direct<\/p>\n

        Whenever a processor is requested to read or write a block of data, i.e. transfer a block of data, it instructs the DMA controller by sending the following information.<\/p>\n

          \n
        1. The first information is whether the data has to be read from memory or the data has to be written to the memory. It passes this information via read or write control lines<\/strong> that is between the processor and DMA controllers control logic unit<\/strong>.<\/li>\n
        2. The processor also provides the starting address<\/strong> of\/ for the data block in the memory, from where the data block in memory has to be read or where the data block has to be written in memory. DMA controller stores this in its address register<\/strong>. It is also called the starting address register<\/strong>.<\/li>\n
        3. The processor also sends the word count<\/strong>, i.e. how many words are to be read or written. It stores this information in the data count<\/strong> or the word count<\/strong> register.<\/li>\n
        4. The most important is the address of I\/O device<\/strong> that wants to read or write data. This information is stored in the data register.<\/strong><\/li>\n<\/ol>\n

          <\/a><\/p>\n

          Direct Memory Access Advantages and Disadvantages<\/h3>\n

          Advantages:<\/h4>\n
            \n
          1. Transferring the data without the involvement of the processor will speed up<\/strong> the read-write task.<\/li>\n
          2. DMA reduces the clock cycle<\/strong> requires to read or write a block of data.<\/li>\n
          3. Implementing DMA also reduces the overhead<\/strong> of the processor.<\/li>\n<\/ol>\n

            Disadvantages<\/h4>\n
              \n
            1. As it is a hardware unit, it would cost<\/strong> to implement a DMA controller in the system.<\/li>\n
            2. Cache coherence <\/strong>problem can occur while using DMA controller.<\/li>\n<\/ol>\n

              <\/a><\/p>\n

              \n

              Key Takeaways<\/h3>\n
                \n
              • DMA is an abbreviation of direct memory access<\/strong>.<\/li>\n
              • DMA is a method of data transfer<\/strong> between main memory and peripheral devices.<\/li>\n
              • The hardware unit that controls the DMA transfer is a DMA controller<\/strong>.<\/li>\n
              • DMA controller transfers the data to and from memory without the participation of the processor<\/strong>.<\/li>\n
              • The processor provides the start address<\/strong> and the word count<\/strong> of the data block which is transferred to or from memory to the DMA controller and frees the bus for DMA controller<\/strong> to transfer the block of data.<\/li>\n
              • DMA controller transfers the data block at the faster rate<\/strong> as data is directly accessed by I\/O devices and is not required to pass through the processor which save the clock cycles.<\/li>\n
              • DMA controller transfers the block of data to and from memory in three modes burst mode<\/strong>, cycle steal mode<\/strong> and transparent mode<\/strong>.<\/li>\n
              • DMA can be configured in various ways it can be a part of individual I\/O devices, or all the peripherals attached to the system may share the same DMA controller.<\/li>\n<\/ul>\n<\/div>\n

                Thus the DMA controller is a convenient mode of data transfer. It is preferred over the programmed I\/O and Interrupt-driven I\/O mode of data transfer.<\/p>\n","protected":false},"excerpt":{"rendered":"

                Direct Memory Access (DMA) transfers the block of data between the memory and peripheral devices of the system, without the participation of the processor. The unit that controls the activity of accessing memory directly is called a DMA controller. The processor relinquishes the system bus for a few clock cycles. So, the DMA controller can […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_genesis_hide_title":false,"_genesis_hide_breadcrumbs":false,"_genesis_hide_singular_image":false,"_genesis_hide_footer_widgets":false,"_genesis_custom_body_class":"","_genesis_custom_post_class":"","_genesis_layout":"","footnotes":""},"categories":[3],"tags":[],"class_list":{"0":"post-514","1":"post","2":"type-post","3":"status-publish","4":"format-standard","6":"category-computer-architecture","7":"entry"},"yoast_head":"\nWhat is Direct Memory Access (DMA)? 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