{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,23]],"date-time":"2025-08-23T05:27:37Z","timestamp":1755926857559,"version":"3.41.0"},"reference-count":60,"publisher":"Association for Computing Machinery (ACM)","issue":"3","license":[{"start":{"date-parts":[[2024,9,30]],"date-time":"2024-09-30T00:00:00Z","timestamp":1727654400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"DOI":"10.13039\/100023581","name":"National Science Foundation Graduate Research Fellowship Program","doi-asserted-by":"crossref","award":["DGE-2038238"],"award-info":[{"award-number":["DGE-2038238"]}],"id":[{"id":"10.13039\/100023581","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Reconfigurable Technol. Syst."],"published-print":{"date-parts":[[2024,9,30]]},"abstract":"<jats:p>\n            Voltage fluctuation sensors measure minute changes in an FPGA power distribution network, allowing attackers to extract information from concurrently executing computations. Previous voltage fluctuation sensors make assumptions about the co-tenant computation and require the attacker have\n            <jats:italic>a priori<\/jats:italic>\n            access or system knowledge to tune the sensor parameters statically. Additionally, prior voltage fluctuation sensors make use of proprietary vendor intellectual property and do not provide guidance on sensor migration to other vendors. We present the open-source design of the Tunable Dual-Polarity Time-to-Digital Converter, which introduces three dynamically tunable parameters that optimize signal measurement, including the transition polarity, sample window, frequency, and phase. We show that a properly tuned sensor improves co-tenant classification accuracy by 2.5\n            <jats:inline-formula content-type=\"math\/tex\">\n              <jats:tex-math notation=\"LaTeX\" version=\"MathJax\">\\(\\times\\)<\/jats:tex-math>\n            <\/jats:inline-formula>\n            over prior work and increases the ability to identify the co-tenant computation and its microarchitectural implementation. Across 13 varying applications, our techniques yield an 80% classification accuracy that generalizes beyond a single board. Our sensor improves the ability of a correlation power analysis attack to rank correct subkey values by 2\n            <jats:inline-formula content-type=\"math\/tex\">\n              <jats:tex-math notation=\"LaTeX\" version=\"MathJax\">\\(\\times\\)<\/jats:tex-math>\n            <\/jats:inline-formula>\n            . As an extension to our prior work, we show that the voltage fluctuation sensor is portable to multiple FPGA vendors, and we demonstrate implementations on both Xilinx and Intel FPGA systems.\n          <\/jats:p>","DOI":"10.1145\/3666092","type":"journal-article","created":{"date-parts":[[2024,6,7]],"date-time":"2024-06-07T18:19:17Z","timestamp":1717784357000},"page":"1-30","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["Turn on, Tune in, and Listen up: Maximizing Side-Channel Recovery in Cross-Platform Time-to-Digital Converters"],"prefix":"10.1145","volume":"17","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5936-033X","authenticated-orcid":false,"given":"Colin","family":"Drewes","sequence":"first","affiliation":[{"name":"Stanford University, Stanford, CA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0163-5449","authenticated-orcid":false,"given":"Tyler","family":"Sheaves","sequence":"additional","affiliation":[{"name":"University of California, Davis, CA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1213-421X","authenticated-orcid":false,"given":"Olivia","family":"Weng","sequence":"additional","affiliation":[{"name":"University of California San Diego, La Jolla, CA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5846-2046","authenticated-orcid":false,"given":"Keegan","family":"Ryan","sequence":"additional","affiliation":[{"name":"University of California San Diego, La Jolla, CA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5318-2010","authenticated-orcid":false,"given":"Bill","family":"Hunter","sequence":"additional","affiliation":[{"name":"Georgia Tech Research Institute, Atlanta, GA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0767-3764","authenticated-orcid":false,"given":"Christopher","family":"McCarty","sequence":"additional","affiliation":[{"name":"Georgia Tech Research Institute, Atlanta, GA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9062-5570","authenticated-orcid":false,"given":"Ryan","family":"Kastner","sequence":"additional","affiliation":[{"name":"University of California San Diego, La Jolla, CA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4587-8947","authenticated-orcid":false,"given":"Dustin","family":"Richmond","sequence":"additional","affiliation":[{"name":"University of California, Santa Cruz, CA, USA"}]}],"member":"320","published-online":{"date-parts":[[2024,9,30]]},"reference":[{"doi-asserted-by":"publisher","key":"e_1_3_2_2_2","DOI":"10.1109\/ICDE.2015.7113304"},{"doi-asserted-by":"publisher","key":"e_1_3_2_3_2","DOI":"10.1007\/978-3-540-28632-5_2"},{"doi-asserted-by":"publisher","key":"e_1_3_2_4_2","DOI":"10.1109\/ACCESS.2021.3123277"},{"doi-asserted-by":"publisher","key":"e_1_3_2_5_2","DOI":"10.1109\/FCCM.2016.18"},{"doi-asserted-by":"publisher","key":"e_1_3_2_6_2","DOI":"10.1109\/TIM.2020.3011490"},{"doi-asserted-by":"publisher","key":"e_1_3_2_7_2","DOI":"10.1007\/s13389-014-0075-9"},{"doi-asserted-by":"publisher","key":"e_1_3_2_8_2","DOI":"10.1109\/TIM.2011.2115390"},{"doi-asserted-by":"publisher","key":"e_1_3_2_9_2","DOI":"10.1145\/3543622.3573193"},{"doi-asserted-by":"publisher","key":"e_1_3_2_10_2","DOI":"10.1109\/PAINE54418.2021.9707701"},{"doi-asserted-by":"publisher","key":"e_1_3_2_11_2","DOI":"10.1145\/1508128.1508145"},{"doi-asserted-by":"publisher","key":"e_1_3_2_12_2","DOI":"10.1109\/ISCA.2018.00012"},{"doi-asserted-by":"publisher","key":"e_1_3_2_13_2","DOI":"10.1007\/11545262_19"},{"doi-asserted-by":"publisher","key":"e_1_3_2_14_2","DOI":"10.1109\/ICCD46524.2019.00010"},{"doi-asserted-by":"publisher","key":"e_1_3_2_15_2","DOI":"10.1109\/SP40000.2020.00070"},{"doi-asserted-by":"publisher","key":"e_1_3_2_16_2","DOI":"10.1145\/3196494.3196518"},{"doi-asserted-by":"publisher","key":"e_1_3_2_17_2","DOI":"10.1145\/3534972"},{"doi-asserted-by":"publisher","key":"e_1_3_2_18_2","DOI":"10.23919\/DATE48585.2020.9116481"},{"doi-asserted-by":"publisher","key":"e_1_3_2_19_2","DOI":"10.23919\/FPL.2017.8056840"},{"doi-asserted-by":"publisher","key":"e_1_3_2_20_2","DOI":"10.1109\/DAC18074.2021.9586098"},{"doi-asserted-by":"publisher","key":"e_1_3_2_21_2","DOI":"10.1109\/SP.2007.28"},{"unstructured":"Intel. 2019. AN 661: Implementing Fractional PLL Reconfiguration with Altera PLL and Altera PLL Reconfig IP Cores. Technical Report.","key":"e_1_3_2_22_2"},{"unstructured":"Intel. 2022. Cyclone V Device Handbook - Volume 1. Device Interfaces and Integration. Retrieved from https:\/\/cdrdv2-public.intel.com\/666995\/cv_5v2-683375-666995.pdf","key":"e_1_3_2_23_2"},{"unstructured":"Intel. 2023. Cyclone V Device Datasheet. Retrieved from https:\/\/www.intel.com\/content\/www\/us\/en\/docs\/programmable\/683801\/current\/pll-specifications.html","key":"e_1_3_2_24_2"},{"unstructured":"Intel. 2023. Intel Agilex 7 Clocking and PLL User Guide: F-Series and I-Series. Technical Report.","key":"e_1_3_2_25_2"},{"unstructured":"Intel. 2023. Intel Arria 10 Core Fabric and General Purpose I\/Os Handbook. Technical Report.","key":"e_1_3_2_26_2"},{"unstructured":"Intel. 2023. Intel MAX 10 Clocking and PLL User Guide. Technical Report.","key":"e_1_3_2_27_2"},{"unstructured":"Intel. 2023. Intel\u00ae Stratix\u00ae 10 Clocking and PLL User Guide. Technical Report.","key":"e_1_3_2_28_2"},{"doi-asserted-by":"publisher","key":"e_1_3_2_29_2","DOI":"10.1109\/JSSC.2018.2822691"},{"doi-asserted-by":"publisher","key":"e_1_3_2_30_2","DOI":"10.1109\/NEWCAS49341.2020.9159812"},{"doi-asserted-by":"publisher","key":"e_1_3_2_31_2","DOI":"10.13154\/tches.v2020.i3.121-146"},{"doi-asserted-by":"publisher","key":"e_1_3_2_32_2","DOI":"10.1109\/ICCAD45719.2019.8942094"},{"doi-asserted-by":"publisher","key":"e_1_3_2_33_2","DOI":"10.13154\/tches.v2018.i3.44-68"},{"doi-asserted-by":"publisher","key":"e_1_3_2_34_2","DOI":"10.1145\/3328222"},{"key":"e_1_3_2_35_2","first-page":"34","article-title":"FPGA-based single chip cryptographic solution","author":"McLean Mark","year":"2007","unstructured":"Mark McLean and Jason Moore. 2007. FPGA-based single chip cryptographic solution. Military Embedded Systems (2007), 34\u201337.","journal-title":"Military Embedded Systems"},{"doi-asserted-by":"publisher","key":"e_1_3_2_36_2","DOI":"10.5815\/ijcnis.2013.03.03"},{"doi-asserted-by":"publisher","key":"e_1_3_2_37_2","DOI":"10.1007\/978-3-319-43283-0_4"},{"doi-asserted-by":"publisher","key":"e_1_3_2_38_2","DOI":"10.1109\/CCECE.2015.7129369"},{"doi-asserted-by":"publisher","key":"e_1_3_2_39_2","DOI":"10.1007\/978-3-642-23951-9_14"},{"doi-asserted-by":"publisher","key":"e_1_3_2_40_2","DOI":"10.1007\/978-3-642-41284-4_11"},{"doi-asserted-by":"publisher","key":"e_1_3_2_41_2","DOI":"10.13154\/tches.v2019.i4.126-153"},{"doi-asserted-by":"publisher","key":"e_1_3_2_42_2","DOI":"10.1109\/ICSMC.2004.1400815"},{"key":"e_1_3_2_43_2","first-page":"114","volume-title":"Proceedings of the Workshop on RFID Security","author":"Plos Thomas","year":"2008","unstructured":"Thomas Plos, Michael Hutter, and Martin Feldhofer. 2008. Evaluation of side-channel preprocessing techniques on cryptographic-enabled HF and UHF RFID-tag prototypes. In Proceedings of the Workshop on RFID Security. Citeseer, 114\u2013127."},{"doi-asserted-by":"publisher","key":"e_1_3_2_44_2","DOI":"10.1007\/978-3-662-48324-4_8"},{"doi-asserted-by":"publisher","key":"e_1_3_2_45_2","DOI":"10.1109\/FPL.2019.00038"},{"doi-asserted-by":"publisher","key":"e_1_3_2_46_2","DOI":"10.1109\/MM.2015.42"},{"doi-asserted-by":"publisher","key":"e_1_3_2_47_2","DOI":"10.1109\/FCCM.2018.00016"},{"doi-asserted-by":"publisher","key":"e_1_3_2_48_2","DOI":"10.1109\/SP.2017.14"},{"doi-asserted-by":"publisher","key":"e_1_3_2_49_2","DOI":"10.23919\/DATE.2018.8342177"},{"doi-asserted-by":"publisher","key":"e_1_3_2_50_2","DOI":"10.1145\/3240765.3240841"},{"doi-asserted-by":"publisher","key":"e_1_3_2_51_2","DOI":"10.3390\/s20082172"},{"doi-asserted-by":"publisher","key":"e_1_3_2_52_2","DOI":"10.1049\/el.2019.0163"},{"key":"e_1_3_2_53_2","first-page":"657","volume-title":"IACR Transactions on Cryptographic Hardware and Embedded Systems","author":"Udugama Brian","year":"2022","unstructured":"Brian Udugama, Darshana Jayasinghe, Hassaan Saadat, Aleksandar Ignjatovic, and Sri Parameswaran. 2022. VITI: A tiny self-calibrating sensor for power-variation measurement in FPGAs. IACR Transactions on Cryptographic Hardware and Embedded Systems (vol. 2022), 657\u2013678. Retrieved from https:\/\/tches.iacr.org\/index.php\/TCHES\/article\/view\/9311"},{"doi-asserted-by":"publisher","key":"e_1_3_2_54_2","DOI":"10.1007\/978-3-642-19074-2_8"},{"doi-asserted-by":"publisher","key":"e_1_3_2_55_2","DOI":"10.1109\/I2MTC.2016.7520401"},{"doi-asserted-by":"publisher","key":"e_1_3_2_56_2","DOI":"10.1109\/TBCAS.2015.2389227"},{"doi-asserted-by":"publisher","key":"e_1_3_2_57_2","DOI":"10.1109\/TCSI.2017.2702098"},{"doi-asserted-by":"publisher","key":"e_1_3_2_58_2","DOI":"10.1145\/3373376.3378491"},{"doi-asserted-by":"publisher","key":"e_1_3_2_59_2","DOI":"10.1145\/3503222.3507733"},{"doi-asserted-by":"publisher","key":"e_1_3_2_60_2","DOI":"10.1109\/SP.2018.00049"},{"doi-asserted-by":"publisher","key":"e_1_3_2_61_2","DOI":"10.1145\/2435264.2435283"}],"container-title":["ACM Transactions on Reconfigurable Technology and Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3666092","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3666092","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3666092","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T01:18:06Z","timestamp":1750295886000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3666092"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,9,30]]},"references-count":60,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2024,9,30]]}},"alternative-id":["10.1145\/3666092"],"URL":"https:\/\/doi.org\/10.1145\/3666092","relation":{},"ISSN":["1936-7406","1936-7414"],"issn-type":[{"type":"print","value":"1936-7406"},{"type":"electronic","value":"1936-7414"}],"subject":[],"published":{"date-parts":[[2024,9,30]]},"assertion":[{"value":"2023-09-14","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2024-05-13","order":2,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2024-09-30","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}