{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,8]],"date-time":"2025-04-08T06:23:14Z","timestamp":1744093394611,"version":"3.28.0"},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,1]]},"DOI":"10.1109\/vlsid.2011.14","type":"proceedings-article","created":{"date-parts":[[2011,2,22]],"date-time":"2011-02-22T17:38:24Z","timestamp":1298396304000},"page":"352-357","source":"Crossref","is-referenced-by-count":36,"title":["Efficient Trace Signal Selection for Post Silicon Validation and Debug"],"prefix":"10.1109","author":[{"given":"K","family":"Basu","sequence":"first","affiliation":[]},{"given":"P","family":"Mishra","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2009.4798278"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2009.20"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2004.1358915"},{"key":"ref13","first-page":"395","article-title":"Towards Accurate and Efficient Reliability Modeling of Nanoelectronic Circuits","author":"taylor","year":"0","journal-title":"Proc Of IEEE-NANO 2006"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/FMCAD.2008.ECP.9"},{"key":"ref3","first-page":"7","article-title":"A reconfigurable design-for-debug infrastructure for socs","author":"abramovici","year":"2006","journal-title":"DAC"},{"key":"ref6","first-page":"1338","article-title":"Trace signal selection for visibility enhancement in post-silicon validation","author":"liu","year":"2009","journal-title":"DATE"},{"key":"ref5","first-page":"285","article-title":"Algorithms for state restoration and tracesignal selection for data acquisition in silicon debug","volume":"28","author":"ko","year":"2009","journal-title":"IEEE TCAD"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1366110.1366132"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2024116"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1999.805821"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2005.1583986"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2003.1270847"}],"event":{"name":"2011 24th International Conference on VLSI Design: concurrently with the 10th International Conference on Embedded Systems Design","start":{"date-parts":[[2011,1,2]]},"location":"Chennai","end":{"date-parts":[[2011,1,7]]}},"container-title":["2011 24th Internatioal Conference on VLSI Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5716645\/5718759\/05718827.pdf?arnumber=5718827","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T04:00:16Z","timestamp":1490068816000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5718827\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,1]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/vlsid.2011.14","relation":{},"subject":[],"published":{"date-parts":[[2011,1]]}}}