{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,31]],"date-time":"2025-05-31T04:21:15Z","timestamp":1748665275852,"version":"3.40.1"},"reference-count":64,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2013,8,1]],"date-time":"2013-08-01T00:00:00Z","timestamp":1375315200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput."],"published-print":{"date-parts":[[2013,8]]},"DOI":"10.1109\/tc.2013.53","type":"journal-article","created":{"date-parts":[[2013,6,28]],"date-time":"2013-06-28T18:55:47Z","timestamp":1372445747000},"page":"1494-1507","source":"Crossref","is-referenced-by-count":22,"title":["Test Strategies for Reliable Runtime Reconfigurable Architectures"],"prefix":"10.1109","volume":"62","author":[{"given":"Lars","family":"Bauer","sequence":"first","affiliation":[]},{"given":"Claus","family":"Braun","sequence":"additional","affiliation":[]},{"given":"Michael E.","family":"Imhof","sequence":"additional","affiliation":[]},{"given":"Michael A.","family":"Kochte","sequence":"additional","affiliation":[]},{"given":"Eric","family":"Schneider","sequence":"additional","affiliation":[]},{"given":"Hongyan","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Jorg","family":"Henkel","sequence":"additional","affiliation":[]},{"given":"Hans-Joachim","family":"Wunderlich","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"article-title":"Homepage of Convey Computer","volume-title":"Convey Comput.","year":"2012","key":"ref1"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2010.110"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1155\/ES\/2006\/56320"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5653636"},{"key":"ref5","article-title":"Variation and Aging Tolerance in FPGAs","volume-title":"Low-Power Variation-Tolerant Design in Nanometer Silicon","author":"Metha","year":"2011"},{"key":"ref6","first-page":"176","article-title":"Reliability Challenges for 45 nm and Beyond","volume-title":"Proc. 43rd Design Automation Conf. (DAC)","author":"McPherson"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.134"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2012.6313838"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ahs.2012.6268667"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4020-6505-7"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-03138-0_23"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1596532.1596540"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2004.104"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/AHS.2011.5963920"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/1142980.1142986"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.5"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1996.510883"},{"article-title":"Correcting Single-Event Upsets through Virtex Partial Configuration","year":"2000","author":"Carmichael","key":"ref18"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2004.2"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1998.743180"},{"key":"ref21","first-page":"1239","article-title":"FPGA Interconnect Delay Fault Testing","author":"Chmelar","year":"2003","journal-title":"Proc. IEEE Int\u2019l Test Conf. (ITC)"},{"volume-title":"Self-Checking and Fault-Tolerant Digital Design","year":"2001","author":"Lala","key":"ref22"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2008.4629973"},{"volume-title":"Fault-Tolerance Techniques for SRAM-Based FPGAs","year":"2010","author":"Kastensmidt","key":"ref24"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/1723112.1723154"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2005.78"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2007.22"},{"key":"ref28","first-page":"1","article-title":"FPGAs with Self-Repair Capabilities","volume-title":"Proc. ACM Int\u2019l Workshop Field Programmable Gate Arrays (FPGA)","author":"Durand"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.2000.903403"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2004.18"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2009.5272313"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/EURMIC.1999.794478"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.884053"},{"key":"ref34","article-title":"Ch. 12.4 Field Programmable Gate Array Testing","volume-title":"VLSI Test Principles and Architectures","author":"Stroud","year":"2006"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/54.199799"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/43.663825"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/92.678888"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/54.655182"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1973.223651"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/SBCCI.1998.715412"},{"article-title":"Testing FPGA Devices Using JBits","volume-title":"Proc. Military and Aerospace Applications of Programmable Devices and Technologies Conf. (MAPLD)","author":"Sundararajan","key":"ref41"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1998.743180"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2000.894276"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.852452"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1145\/775832.776003"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2011.12"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996705"},{"key":"ref48","first-page":"87","article-title":"Embedded Processor Based Built-in Self-Test and Diagnosis of Logic and Memory Resources in FPGAs","volume-title":"Proc. Int\u2019l Conf. Embedded Systems and Applications (ESA)","author":"Milton"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.891102"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2009.51"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.837989"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1999.805830"},{"volume-title":"VLSI Test Principles and Architectures: Design for Testability","year":"2006","author":"Wang","key":"ref53"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2008.4484786"},{"key":"ref55","first-page":"201","article-title":"Operating System Scheduling for Efficient Online Self-Test in Robust Systems","volume-title":"Proc. ACM Int\u2019l Conf. Computer-Aided Design (ICCAD)","author":"Li"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2008.4700583"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1109\/FOCS.1967.33"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008389920806"},{"key":"ref59","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1995.529889"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2011.5981545"},{"key":"ref61","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176720"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2008.4629932"},{"article-title":"Homepage of the Leon Processor","year":"2012","author":"Gaisler","key":"ref63"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-008-0304-5"}],"container-title":["IEEE Transactions on Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/12\/6547961\/06475939.pdf?arnumber=6475939","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,18]],"date-time":"2025-03-18T06:04:48Z","timestamp":1742277888000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6475939\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,8]]},"references-count":64,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tc.2013.53","relation":{},"ISSN":["0018-9340"],"issn-type":[{"type":"print","value":"0018-9340"}],"subject":[],"published":{"date-parts":[[2013,8]]}}}