{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,1,8]],"date-time":"2024-01-08T14:46:33Z","timestamp":1704725193889},"reference-count":9,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2016,1,1]],"date-time":"2016-01-01T00:00:00Z","timestamp":1451606400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Comput. Sci. Eng."],"published-print":{"date-parts":[[2016,1]]},"DOI":"10.1109\/mcse.2016.16","type":"journal-article","created":{"date-parts":[[2015,12,21]],"date-time":"2015-12-21T20:03:36Z","timestamp":1450728216000},"page":"80-87","source":"Crossref","is-referenced-by-count":9,"title":["Hardware Acceleration for Query Processing: Leveraging FPGAs, CPUs, and Memory"],"prefix":"10.1109","volume":"18","author":[{"given":"Oriol","family":"Arcas-Abella","sequence":"first","affiliation":[]},{"given":"Adria","family":"Armejach","sequence":"additional","affiliation":[]},{"given":"Timothy","family":"Hayes","sequence":"additional","affiliation":[]},{"given":"Gorker Alp","family":"Malazgirt","sequence":"additional","affiliation":[]},{"given":"Oscar","family":"Palomar","sequence":"additional","affiliation":[]},{"given":"Behzad","family":"Salami","sequence":"additional","affiliation":[]},{"given":"Nehir","family":"Sonmez","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2014.6927484"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2015.28"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555801"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056019"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/SBAC-PAD.2015.23"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2150976.2150982"},{"key":"ref2","first-page":"277","article-title":"Accelerating Complete Decision Support Queries Through High-Level Synthesis Technology","author":"malazgirt","year":"0","journal-title":"Proc ACM\/SIGDA Int'l Symp Field-Programmable Gate Arrays"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485957"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MCSE.2010.93"}],"container-title":["Computing in Science & Engineering"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/5992\/7361653\/7361655.pdf?arnumber=7361655","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:43:24Z","timestamp":1642005804000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7361655\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,1]]},"references-count":9,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/mcse.2016.16","relation":{},"ISSN":["1521-9615"],"issn-type":[{"value":"1521-9615","type":"print"}],"subject":[],"published":{"date-parts":[[2016,1]]}}}