{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T16:26:59Z","timestamp":1743438419474},"reference-count":9,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2002,12,1]],"date-time":"2002-12-01T00:00:00Z","timestamp":1038700800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2002,12]]},"DOI":"10.1109\/jssc.2002.804337","type":"journal-article","created":{"date-parts":[[2003,1,22]],"date-time":"2003-01-22T18:16:44Z","timestamp":1043259404000},"page":"1781-1789","source":"Crossref","is-referenced-by-count":41,"title":["A 10-Gb\/s CDR\/DEMUX with LC delay line VCO in 0.18-\u03bcm CMOS"],"prefix":"10.1109","volume":"37","author":[{"given":"J.E.","family":"Rogers","sequence":"first","affiliation":[]},{"given":"J.R.","family":"Long","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"78","article-title":"a 10gb\/s cmos clock and data recovery circuit with frequency detection","author":"savoj","year":"2001","journal-title":"Proc ISSCC"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/4.890309"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/4.545832"},{"key":"ref5","first-page":"254","article-title":"a 10gb\/s cdr\/demux with lc delay line vco in 0.18<formula><tex>$\\mu$<\/tex><\/formula>m cmos","author":"rogers","year":"2002","journal-title":"Proc ISSCC"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/4.557634"},{"key":"ref7","author":"johns","year":"1997","journal-title":"Analog Integrated Circuit Design"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/4.173109"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/4.845194"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/6.893329"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4\/23646\/01088107.pdf?arnumber=1088107","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:27:33Z","timestamp":1638217653000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1088107\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002,12]]},"references-count":9,"journal-issue":{"issue":"12","published-print":{"date-parts":[[2002,12]]}},"URL":"https:\/\/doi.org\/10.1109\/jssc.2002.804337","relation":{},"ISSN":["0018-9200"],"issn-type":[{"value":"0018-9200","type":"print"}],"subject":[],"published":{"date-parts":[[2002,12]]}}}