{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T18:27:30Z","timestamp":1729621650136,"version":"3.28.0"},"reference-count":9,"publisher":"IEEE","license":[{"start":{"date-parts":[[2008,5,1]],"date-time":"2008-05-01T00:00:00Z","timestamp":1209600000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2008,5,1]],"date-time":"2008-05-01T00:00:00Z","timestamp":1209600000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,5]]},"DOI":"10.1109\/iscas.2008.4542169","type":"proceedings-article","created":{"date-parts":[[2008,6,16]],"date-time":"2008-06-16T16:26:17Z","timestamp":1213633577000},"page":"3322-3325","source":"Crossref","is-referenced-by-count":0,"title":["\u201cGreen\u201d micro-architecture and circuit co-design for ternary content addressable memory"],"prefix":"10.1109","author":[{"family":"Po-Tsang Huang","sequence":"first","affiliation":[{"name":"Department of Electronics Engineering & Institute of electronics, and, Microelectronics and Information Systems Research Center, National Chiao-Tung University, HsinChu 300, Taiwan"}]},{"family":"Shu-Wei Chang","sequence":"additional","affiliation":[{"name":"Department of Electronics Engineering & Institute of electronics, and, Microelectronics and Information Systems Research Center, National Chiao-Tung University, HsinChu 300, Taiwan"}]},{"family":"Wen-Yen Liu","sequence":"additional","affiliation":[{"name":"Department of Electronics Engineering & Institute of electronics, and, Microelectronics and Information Systems Research Center, National Chiao-Tung University, HsinChu 300, Taiwan"}]},{"family":"Wei Hwang","sequence":"additional","affiliation":[{"name":"Department of Electronics Engineering & Institute of electronics, and, Microelectronics and Information Systems Research Center, National Chiao-Tung University, HsinChu 300, Taiwan"}]}],"member":"263","reference":[{"key":"3","first-page":"166","article-title":"tcam for ip-address lookup using treestyle and-type match lines and segmented search lines","author":"wang","year":"2006","journal-title":"IEEE International Solid-State Circuits Conference"},{"key":"2","first-page":"587","article-title":"a storage- and power-efficient range-matching tcam for packet classification","author":"kim","year":"2006","journal-title":"IEEE International Solid-State Circuits Conference"},{"key":"1","first-page":"464","article-title":"an and-type match-line scheme for energy-efficient content addressable memories","volume":"1","author":"wang","year":"2005","journal-title":"IEEE International Solid-State Circuits Conference"},{"key":"7","doi-asserted-by":"crossref","first-page":"430","DOI":"10.1109\/TVLSI.2006.874378","article-title":"leakage-suppressed clock-gating circuit with zigzag super cut-off cmos (zsccmos) for leakage-dominant sub-70-nm and sub-1-v-vdd lsis","volume":"14","author":"sakurai","year":"2006","journal-title":"IEEE Transactions on VLSI Systems"},{"key":"6","first-page":"129","article-title":"distributed data-retention power gating techniques for column and row co-controlled embedded sram","author":"hua","year":"2005","journal-title":"International Workshop on Memory Technology Design and Testing"},{"key":"5","first-page":"444","article-title":"noise-tolerant xor-based conditional keeper for high fan-in dynamic circuits","volume":"1","author":"hua","year":"2005","journal-title":"IEEE International Symposium on Circuits and Systems"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.831433"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/4.661206"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/4.280705"}],"event":{"name":"2008 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2008,5,18]]},"location":"Seattle, WA, USA","end":{"date-parts":[[2008,5,21]]}},"container-title":["2008 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4534149\/4541329\/04542169.pdf?arnumber=4542169","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,2,16]],"date-time":"2024-02-16T01:21:10Z","timestamp":1708046470000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/4542169\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,5]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/iscas.2008.4542169","relation":{},"subject":[],"published":{"date-parts":[[2008,5]]}}}