{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,25]],"date-time":"2026-01-25T05:40:28Z","timestamp":1769319628432,"version":"3.49.0"},"reference-count":23,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,1]]},"DOI":"10.1109\/aspdac.2014.6742953","type":"proceedings-article","created":{"date-parts":[[2014,2,21]],"date-time":"2014-02-21T16:20:31Z","timestamp":1392999631000},"page":"578-585","source":"Crossref","is-referenced-by-count":10,"title":["A scalable custom simulation machine for the Bayesian Confidence Propagation Neural Network model of the brain"],"prefix":"10.1109","author":[{"given":"Nasim","family":"Farahini","sequence":"first","affiliation":[]},{"given":"Ahmed","family":"Hemani","sequence":"additional","affiliation":[]},{"given":"Anders","family":"Lansner","sequence":"additional","affiliation":[]},{"given":"Fabian","family":"Clermidy","sequence":"additional","affiliation":[]},{"given":"Christer","family":"Svensson","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","article-title":"Adapteva: More flops, less watts. Epiphany offers floating point accelerator for mobile processors","author":"gwennap","year":"2011","journal-title":"Microprocessor Report"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2013.49"},{"key":"17","article-title":"Hybrid memory cube (HMC)","volume":"23","author":"thomas pawlowski","year":"2011","journal-title":"Hot Chips"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1021\/nl904092h"},{"key":"18","first-page":"365","article-title":"Dark silicon and the end of multicore scaling","author":"esmaeilzadeh","year":"2011","journal-title":"2011 38th Annual International Symposium on Computer Architecture (ISCA) ISCA"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/40.782563"},{"key":"16","year":"2013","journal-title":"Hybrid Memory Cube Specification 1 0"},{"key":"13","doi-asserted-by":"crossref","DOI":"10.1145\/1978542.1978559","article-title":"Cognitive Computing: Unite neuroscience, supercomputing, and nanotechnology to discover, demonstrate, and deliver the brain's core algorithms","volume":"54","author":"modha","year":"2011","journal-title":"Communications of the ACM"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1016\/j.neunet.2006.05.029"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2012.6272131"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2259038"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2011.6043232"},{"key":"3","doi-asserted-by":"crossref","DOI":"10.1109\/82.842110","article-title":"Point-to-point connectivity between neuromorphic chips using address events","volume":"47","author":"boahen","year":"2000","journal-title":"IEEE Trans Circuits Syst II Analog Digit Signal Process"},{"key":"20","article-title":"Chips 2020: A Guide to the Future of Nanoelectronics","author":"hoefflinger","year":"2012","journal-title":"Springer Publishers"},{"key":"2","article-title":"Brain-scale simulation of the neocortex on the IBM blue gene\/L supercomputer","volume":"52","author":"lundqvist","year":"2008","journal-title":"IBM Journal of Research and Development"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1142\/S0129065796000816"},{"key":"10","article-title":"ExaScale computing - Fact or a fiction?, Slide 8","author":"borkar","year":"2013","journal-title":"Keynote at IPDPS"},{"key":"7","article-title":"Compass: A scalable simulator for an architecture for cognitive computing","author":"preissl","year":"2012","journal-title":"Proc of the International Conference for High Performance Computing Networking Storage and Analysis"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2014.6742950"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1038\/nrn1848"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1007\/s00422-011-0435-9"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.2010.5596678"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.3389\/fninf.2011.00019"}],"event":{"name":"2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)","location":"Singapore","start":{"date-parts":[[2014,1,20]]},"end":{"date-parts":[[2014,1,23]]}},"container-title":["2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6736726\/6742831\/06742953.pdf?arnumber=6742953","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T04:21:05Z","timestamp":1498105265000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6742953\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,1]]},"references-count":23,"URL":"https:\/\/doi.org\/10.1109\/aspdac.2014.6742953","relation":{},"subject":[],"published":{"date-parts":[[2014,1]]}}}