{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,8]],"date-time":"2024-09-08T15:58:37Z","timestamp":1725811117873},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2006,12]]},"DOI":"10.1109\/apccas.2006.342422","type":"proceedings-article","created":{"date-parts":[[2007,4,24]],"date-time":"2007-04-24T14:02:46Z","timestamp":1177423366000},"page":"1301-1304","source":"Crossref","is-referenced-by-count":2,"title":["Low Power Pre-Comparison Scheme for NOR-Type 10T Content Addressable Memory"],"prefix":"10.1109","author":[{"given":"Po-Tsang","family":"Huang","sequence":"first","affiliation":[]},{"given":"Wei-Keng","family":"Chang","sequence":"additional","affiliation":[]},{"given":"Wei","family":"Hwang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"629","article-title":"Static Divided Word Matching Line For Low-Power Content Addressable Memory Design","author":"cheng","year":"2004","journal-title":"Int Symp Circuits and Systems"},{"key":"ref3","first-page":"654","article-title":"A Low-Power Precomputation-Based Fully Parallel Content-Addressable Memory","author":"lin","year":"2003","journal-title":"IEEE J Solid-State Circuit"},{"key":"ref6","first-page":"136","article-title":"An Adaptive Serial-Parallel CAM Architecture for Low-Power Cache Blocks","author":"efthymiou","year":"2002","journal-title":"Int Symp Low Power Electronics Design"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.824298"},{"key":"ref7","first-page":"136","article-title":"An Adaptive Serial-Parallel CAM Architecture for Low-Power Cache Blocks","author":"efthymiou","year":"2004","journal-title":"Int Symp Low Power Electronics Design"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"196","DOI":"10.1145\/263272.263332","article-title":"Reducing TLB power requirements","author":"juan","year":"1997","journal-title":"Proceedings of 1997 International Symposium on Low Power Electronics and Design LPE"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ASIC.2001.954697"}],"event":{"name":"APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems","start":{"date-parts":[[2006,12,4]]},"location":"Singapore","end":{"date-parts":[[2006,12,7]]}},"container-title":["APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4145316\/4118066\/04145639.pdf?arnumber=4145639","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,17]],"date-time":"2017-06-17T12:40:21Z","timestamp":1497703221000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4145639\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006,12]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/apccas.2006.342422","relation":{},"subject":[],"published":{"date-parts":[[2006,12]]}}}