{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,28]],"date-time":"2025-08-28T12:29:42Z","timestamp":1756384182995,"version":"3.40.2"},"reference-count":46,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2002,3,1]],"date-time":"2002-03-01T00:00:00Z","timestamp":1014940800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Proc. IEEE"],"published-print":{"date-parts":[[2002,3]]},"DOI":"10.1109\/5.993402","type":"journal-article","created":{"date-parts":[[2002,8,24]],"date-time":"2002-08-24T20:14:45Z","timestamp":1030220085000},"page":"345-357","source":"Crossref","is-referenced-by-count":45,"title":["Adaptive CMOS: from biological inspiration to systems-on-a-chip"],"prefix":"10.1109","volume":"90","author":[{"given":"C.","family":"Diorio","sequence":"first","affiliation":[]},{"given":"D.","family":"Hsu","sequence":"additional","affiliation":[]},{"given":"M.","family":"Figueroa","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"volume-title":"The Computational Brain","year":"1993","author":"Churchland","key":"ref1"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/5.58356"},{"volume-title":"Learning in Silicon","year":"1999","author":"Cauwenberghs","key":"ref3"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1152\/jn.1986.55.3.540"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/4.890297"},{"volume-title":"Foundations of learning in analog VLSI","year":"1997","author":"Hasler","key":"ref6"},{"volume-title":"A Three-terminal silicon synaptic device","year":"1998","author":"Diorio","key":"ref7"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/978-0-585-28001-1_14"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008244314595"},{"volume-title":"Neurally inspired silicon learning: From synapse transistors to learning arrays","year":"1997","author":"Diorio","key":"ref10"},{"volume-title":"A Semiconductor structure for long-term learning","year":"1997","author":"Diorio","key":"ref11"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/16.543035"},{"volume-title":"Physics and Technology of Semiconductor Devices","year":"1967","author":"Grove","key":"ref13"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1063\/1.1657043"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/16.644652"},{"volume-title":"Analog VLSI and Neural Systems","year":"1989","author":"Mead","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1999.780744"},{"volume-title":"Physics of Semiconductor Devices","year":"1981","author":"Sze","key":"ref18"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/98.788215"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1995.523872"},{"volume-title":"Digital Communications","year":"1988","author":"Sklar","key":"ref21"},{"key":"ref22","first-page":"765","article-title":"Architectural implementation issues in a wideband receiver using multiuser detection","volume-title":"Proc. 36th Allerton Conf. Communications, Control, and Computing","author":"Zhang"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/4.918920"},{"key":"ref24","first-page":"623","article-title":"Design and implementation issues for a wideband, indoor DS-CDMA system providing multimedia access","volume-title":"Proc. 34th Allerton Conf. Communications, Control, and Computing","author":"Teuscher"},{"key":"ref25","first-page":"13","article-title":"Principles of data acquisition and conversion","volume-title":"Data Acquisition and Conversion Handbook","author":"Zuch","year":"1979"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/4.735536"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/4.808896"},{"key":"ref28","first-page":"46","article-title":"A floating-gate trimmable high-resolution DAC in standard 0.25 \u00b5m CMOS","volume-title":"Proc. Nonvolatile Semiconductor Memory Workshop","author":"Figueroa"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/82.913189"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/82.913196"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1023\/A:1013703711427"},{"volume-title":"The Handbook of Brain Theory and Neural Networks","year":"1995","author":"Arbib","key":"ref32"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.21236\/ada451466"},{"key":"ref34","first-page":"882","article-title":"The softmax nonlinearity: Derivation using statistical mechanics and useful properties as a multiterminal analog circuit element","volume-title":"Advances in Neural Information Processing Systems 6","author":"Elfadel","year":"1994"},{"key":"ref35","first-page":"717","article-title":"A winner-take-all circuit with controllable soft max property","volume-title":"Advances in Neural Information Processing Systems 12","author":"Liu","year":"2000"},{"key":"ref36","first-page":"574","article-title":"Maximum likelihood competitive learning","volume-title":"Advances in Neural Information Processing Systems 2","author":"Nowlan","year":"1990"},{"key":"ref37","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-642-97966-8","volume-title":"Self Organizing Feature Maps","author":"Kohonen","year":"1997"},{"volume-title":"Bump circuits for computing similarity and dissimilarity of analog voltages","year":"1993","author":"Delbruck","key":"ref38"},{"key":"ref39","first-page":"713","article-title":"A silicon primitive for competitive learning","volume-title":"Advances in Neural Information Processing Systems 13","author":"Hsu","year":"2001"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1016\/S0079-7421(08)60113-9"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1007\/BF00115009"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1126\/science.275.5297.213"},{"key":"ref43","first-page":"33","article-title":"Adaptive circuits and synapses using pFET floating-gate devices","volume-title":"Learning in Silicon","author":"Hasler","year":"1999"},{"volume-title":"A Spike-Based Learning Rule and its Implementation in Analog Hardware","year":"1999","author":"Hafliger","key":"ref44"},{"key":"ref45","article-title":"Learning spike-based correlations and conditional probabilities in silicon","volume-title":"Advances in Neural Information Processing Systems 14","author":"Shon","year":"2002"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/5.220908"}],"container-title":["Proceedings of the IEEE"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5\/21426\/00993402.pdf?arnumber=993402","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,21]],"date-time":"2025-03-21T09:18:29Z","timestamp":1742548709000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/993402\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002,3]]},"references-count":46,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/5.993402","relation":{},"ISSN":["0018-9219"],"issn-type":[{"type":"print","value":"0018-9219"}],"subject":[],"published":{"date-parts":[[2002,3]]}}}