{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,16]],"date-time":"2025-01-16T05:10:25Z","timestamp":1737004225618,"version":"3.33.0"},"reference-count":32,"publisher":"Springer Science and Business Media LLC","issue":"3","license":[{"start":{"date-parts":[[1994,6,1]],"date-time":"1994-06-01T00:00:00Z","timestamp":770428800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Int J Parallel Prog"],"published-print":{"date-parts":[[1994,6]]},"DOI":"10.1007\/bf02577734","type":"journal-article","created":{"date-parts":[[2007,3,22]],"date-time":"2007-03-22T23:32:31Z","timestamp":1174606351000},"page":"243-272","source":"Crossref","is-referenced-by-count":3,"title":["Code scheduling for multiple instruction stream architectures"],"prefix":"10.1007","volume":"22","author":[{"given":"Gary","family":"Tyson","sequence":"first","affiliation":[]},{"given":"Matthew","family":"Farrens","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"BF02577734_CR1","doi-asserted-by":"crossref","unstructured":"N. P. Jouppi and D. W. Wall, Available instruction-level parallelism for superscalar and superpipelined machines,Proc. of the Third Int. Conf. on Architectural Support for Programming Languages and Operating Systems, Boston, Mass, pp. 272\u2013282 (April 1989).","DOI":"10.1145\/70082.68207"},{"key":"BF02577734_CR2","doi-asserted-by":"crossref","unstructured":"M. E. Benitez and J. W. Davidson, Code generation for streaming: an access\/execute mechanism,Proc. of the Fourth Int. Conf. on Architectural Support for Programming Languages and Operating Systems, Santa Clara, CA, pp. 132\u2013141 (April 1991).","DOI":"10.1145\/106972.106987"},{"issue":"2","key":"BF02577734_CR3","doi-asserted-by":"crossref","first-page":"342","DOI":"10.1145\/146628.140395","volume":"20","author":"T. Austin","year":"1992","unstructured":"T. Austin and G. Sohi, Dynamic dependency analysis of ordinary programs,Proc. of the 19th Ann. Symp. on Computer Architecture 20(2):342\u2013351 (May 1992).","journal-title":"Proc. of the 19th Ann. Symp. on Computer Architecture"},{"key":"BF02577734_CR4","doi-asserted-by":"crossref","unstructured":"M. Butler, T. Yeh, and Y. Patt, Single instruction stream parallelism is greater than two,Proc. of the Eighteenth Ann. Int. Symp. on Computer Architecture, Toronto, Canada, pp. 276\u2013286 (May 1991).","DOI":"10.1145\/115952.115980"},{"issue":"4","key":"BF02577734_CR5","doi-asserted-by":"crossref","first-page":"289","DOI":"10.1145\/357401.357403","volume":"2","author":"J. E. Smith","year":"1984","unstructured":"J. E. Smith, Decoupled access\/execute computer architectures,Trans. on Computer Systems 2(4):289\u2013308 (November 1984).","journal-title":"Trans. on Computer Systems"},{"key":"BF02577734_CR6","doi-asserted-by":"crossref","unstructured":"J. E. Smith, G. E. Dermer, B. D. Vanderwarn, S. D. Klinger, C. M. Rozewski, D. L. Fowler, K. R. Scidmore, and J. P. Laudon. The ZS-1 central processor,Proc. of the Second Int. Conf. on Architectural Support for Programming Languages and Operating Systems, Palo Alto, California, pp. 199\u2013204 (October 1987).","DOI":"10.1145\/36204.36203"},{"issue":"2","key":"BF02577734_CR7","doi-asserted-by":"crossref","first-page":"382","DOI":"10.1145\/146628.140402","volume":"20","author":"W. Wulf","year":"1992","unstructured":"W. Wulf, Evaluation of the WM architecture,Proc. of the 19th Ann. Symp. on Computer Architecture 20(2):382\u2013390 (May 1992).","journal-title":"Proc. of the 19th Ann. Symp. on Computer Architecture"},{"issue":"2","key":"BF02577734_CR8","doi-asserted-by":"crossref","first-page":"33","DOI":"10.1145\/151220.151226","volume":"36","author":"R. L. Sites","year":"1993","unstructured":"R. L. Sites, Alpha AXP architecture,Comm. of the ACM 36(2):33\u201344 (February 1993).","journal-title":"Comm. of the ACM"},{"issue":"2","key":"BF02577734_CR9","first-page":"180","volume":"20","author":"C. Stephens","year":"1992","unstructured":"C. Stephens, B. Cogswell, J. Heinlein, G. Palmer, and J. P. Shen, Instruction level profiling and evaluation of the IBM RS\/6000,Proc. of the 19th Ann. Symp. on Computer Architecture 20(2):180\u2013189 (May 1992).","journal-title":"Proc. of the 19th Ann. Symp. on Computer Architecture"},{"key":"BF02577734_CR10","doi-asserted-by":"crossref","unstructured":"J. R. Goodman, J. T. Hsieh, K. Liou, A. R. Pleszkun, P. B. Schechter, and H. C. Young, PIPE: a VLSI decoupled architecture,Proc. of the Twelveth Ann. Int. Symp. on Computer Architecture, pp. 20\u201327 (June 1985).","DOI":"10.1145\/327070.327117"},{"key":"BF02577734_CR11","unstructured":"G. L. Craig, J. R. Goodman, R. H. Katz, A. R. Pleszjun, K. Ramachandran, J. Sayah, and J. E. Smith, PIPE: a high performance VLSI processor implementation,Journal of VLSI and Computer Systems, Vol. 2 (1987)."},{"key":"BF02577734_CR12","doi-asserted-by":"crossref","unstructured":"D. Wall, Limits of instruction-level parallelism,Proc. of the Fourth Int. Conf. on Architectural Support for Programming Languages and Operating Systems, Santa Clara, California, pp. 176\u2013189 (April 1991).","DOI":"10.1145\/106972.106991"},{"key":"BF02577734_CR13","doi-asserted-by":"crossref","unstructured":"M. Farrens, G. Tyson, and A. Pleszkun, A study of single-chip processor\/cache organizations for large numbers of transistors,Proc. of the 21th Ann. Int. Symp. on Computer Architecture, Chicago, Illinois (April 1994).","DOI":"10.1109\/ISCA.1994.288137"},{"key":"BF02577734_CR14","doi-asserted-by":"crossref","unstructured":"M. S. Lam, Software pipelining: an effective scheduling technique for VLIW machines,Proc. of the ACM SIGPLAN Notices 1988 Conf. on Programming Languages and Implementations, pp. 318\u2013328 (June 1988).","DOI":"10.1145\/53990.54022"},{"key":"BF02577734_CR15","doi-asserted-by":"crossref","unstructured":"S. Weiss and J. E. Smith, A study of scalar compaction techniques for pipelined supercomputers,Proc. of the Second Int. Conf. on Architectural Support for Programming Languages and Operating Systems, Palo Alto, California, pp. 105\u2013109 (October 1987).","DOI":"10.1145\/36204.36191"},{"key":"BF02577734_CR16","doi-asserted-by":"crossref","unstructured":"G. Tyson, M. Farrens, and A. Pleszkun, MISC: a multiple instruction stream computer,Proc. of the 25th Ann. Int. Symp. on Computer Architecture, Portland, Oregon, pp. 193\u2013196 (December 1992).","DOI":"10.1109\/MICRO.1992.697016"},{"key":"BF02577734_CR17","doi-asserted-by":"crossref","unstructured":"J. R. Allen, K. Kennedy, C. Porterfield, and J. Warren, Conversion of control dependencies to data dependencies,Proc. of the 10th ACM Symp. on Principles of Programming Languages, pp. 177\u2013189 (January 1983).","DOI":"10.1145\/567067.567085"},{"key":"BF02577734_CR18","doi-asserted-by":"crossref","unstructured":"M. Farrens and A. Pleszkun, Overview of the PIPE processor implementation,Proc. of the 24th Ann. Hawaii Int. Conf. on System Sciences, Kapaa, Kauai, pp. 433\u2013443 (January 1991).","DOI":"10.1109\/HICSS.1991.183913"},{"key":"BF02577734_CR19","unstructured":"H. C. Young,Evaluation of a Decoupled Computer Architecture and the Design of a Vector Extension, Ph.D. Thesis, University of Wisconsin-Madison (July 1985)."},{"key":"BF02577734_CR20","doi-asserted-by":"crossref","unstructured":"M. E. Benitez and J. W. Davidson, Code generation for streaming: an access\/execute mechanism,Proc. of the Fourth Int. Conf. on Architectural Support for Programming Languages and Operating Systems, Santa Clara, California, pp. 132\u2013141 (April 1991).","DOI":"10.1145\/106972.106987"},{"key":"BF02577734_CR21","unstructured":"R. Gupta, A fine-grained MIMD architecture based upon register channels,Proc. of the 23rd Ann. Symp. and Workshop on Microprogramming and Microarchitectures, Orlando, Florida, pp. 54\u201364 (November 1990)."},{"key":"BF02577734_CR22","doi-asserted-by":"crossref","unstructured":"F. Ferrante, K. Ottenstein, and J. Warren, The program dependence graph and its use in optimization,ACM Trans. on Programming Languages and Systems, pp. 319\u2013349 (July 1987).","DOI":"10.1145\/24039.24041"},{"key":"BF02577734_CR23","doi-asserted-by":"crossref","unstructured":"R. A. Iannucci, Toward a dataflow\/von Neumann hybrid architecture,Proc. of the 15th Ann. Symp. on Computer Architecture, pp. 131\u2013140 (1988).","DOI":"10.1109\/ISCA.1988.5222"},{"key":"BF02577734_CR24","doi-asserted-by":"crossref","unstructured":"R. Gupta, The fuzzy barrier: a mechanism for high-speed synchronization of processors,Proc. of the Third Int. Conf. on Architectural Support for Programming Languages and Operating Systems, pp. 54\u201364 (1989).","DOI":"10.1145\/70082.68187"},{"key":"BF02577734_CR25","doi-asserted-by":"crossref","unstructured":"A. Wolfe and J. P. Shen, A variable instruction stream extension to the VLIW architecture,Proc. of the Fourth Int. Conf. on Architectural Support for Programming Languages and Operating Systems, Santa Clara, California, pp. 2\u201314 (April 1991).","DOI":"10.1145\/106972.106976"},{"key":"BF02577734_CR26","doi-asserted-by":"crossref","unstructured":"M. Danelutto and M. Vanneschi, VLIW-in-the-large: a model for fine grain parallelism exploitation on distributed memory multiprocessors,Proc. of the 23rd Ann. Symp. and Workshop on Microprogramming and Microarchitectures, Orlando, Florida, pp. 7\u201316 (November 1990).","DOI":"10.1109\/MICRO.1990.151422"},{"key":"BF02577734_CR27","doi-asserted-by":"crossref","unstructured":"S. W. Keckler and W. J. Dally, Processor coupling: integrating compile time and runtime scheduling for parallelism,Proc. of the 19th Ann. Int. Symp. on Computer Architecture, Queensland, Australia, pp. 202\u2013213 (May 1992).","DOI":"10.1145\/139669.139728"},{"key":"BF02577734_CR28","doi-asserted-by":"crossref","unstructured":"S. A. Mahlke, D. C. Lin, W. Y. Chen, R. E. Hank, and R. A. Bringmann, Effective compiler support for predicated execution using the hyperblock,Proc. of the 25th Ann. Int. Symp. on Microarchitecture, Portland, Oregon, pp. 45\u201354 (December 1992).","DOI":"10.1109\/MICRO.1992.696999"},{"key":"BF02577734_CR29","doi-asserted-by":"crossref","unstructured":"J. E. Smith, Decoupled access\/execute computer architectures,Proc. of the Ninth Ann. Int. Symp. on Computer Architecture, Austin, Texas, pp. 112\u2013119 (April 1982).","DOI":"10.1145\/1067649.801719"},{"key":"BF02577734_CR30","unstructured":"A. V. Aho, R. Sethi and J. D. Ullman,Compilers Principles, Techniques and Tools, Addison-Wesley Publishing, pp. 644"},{"key":"BF02577734_CR31","unstructured":"G. S. Tyson, R. Shaw, and M. Farrens, An interactive compiler development system,Tcl\/Tk Workshop (June 1993)."},{"key":"BF02577734_CR32","doi-asserted-by":"crossref","unstructured":"B. R. Rau, M. S. Schlansker, and P. P. Tirumalai, Code generation schema for modulo scheduled loops,Proc. of the 25th Ann. Int. Symp. on Microarchitecture, Portland, Oregon, pp. 158\u2013169 (December 1992).","DOI":"10.1109\/MICRO.1992.697012"}],"container-title":["International Journal of Parallel Programming"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF02577734.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/BF02577734\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF02577734","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,15]],"date-time":"2025-01-15T05:16:25Z","timestamp":1736918185000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BF02577734"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1994,6]]},"references-count":32,"journal-issue":{"issue":"3","published-print":{"date-parts":[[1994,6]]}},"alternative-id":["BF02577734"],"URL":"https:\/\/doi.org\/10.1007\/bf02577734","relation":{},"ISSN":["0885-7458","1573-7640"],"issn-type":[{"type":"print","value":"0885-7458"},{"type":"electronic","value":"1573-7640"}],"subject":[],"published":{"date-parts":[[1994,6]]}}}